2 * This is the IBM/Motorola/Apple/whoever Linux incarnation of
3 * arch-dependent OS-dependent routines. See also "linux-os.c". */
6 * This software is part of the SBCL system. See the README file for
9 * This software is derived from the CMU CL system, which was
10 * written at Carnegie Mellon University and released into the
11 * public domain. The software is in the public domain and is
12 * provided with absolutely no warranty. See the COPYING and CREDITS
13 * files for more information.
16 /* These header files were lifted wholesale from linux-os.c, some may
17 * be redundant. -- Dan Barlow ca. 2001-05-01 */
19 #include <sys/param.h>
25 #include "interrupt.h"
29 #include <sys/socket.h>
30 #include <sys/utsname.h>
32 #include <sys/types.h>
39 size_t os_vm_page_size;
41 #if defined GENCGC /* unlikely ... */
42 #error SBCL PPC does not work with the GENCGC
46 os_context_register_t *
47 os_context_register_addr(os_context_t *context, int offset)
49 return &((context->uc_mcontext.regs)->gpr[offset]);
52 os_context_register_t *
53 os_context_pc_addr(os_context_t *context)
55 return &((context->uc_mcontext.regs)->nip);
58 os_context_register_t *
59 os_context_lr_addr(os_context_t *context)
61 return &((context->uc_mcontext.regs)->link);
65 os_context_sigmask_addr(os_context_t *context)
67 return &context->uc_sigmask;
71 os_context_fp_control(os_context_t *context)
73 /* So this may look like nice, well behaved code. However, closer
74 inspection reveals that gpr is simply the general purpose
75 registers, and PT_FPSCR is an offset that is larger than 32
76 (the number of ppc registers), but that happens to get the
77 right answer. -- CSR, 2002-07-11 */
78 return context->uc_mcontext.regs->gpr[PT_FPSCR];
82 os_restore_fp_control(os_context_t *context)
84 unsigned long control;
86 control = os_context_fp_control(context) &
87 /* FIXME: Should we preserve the user's requested rounding mode?
91 ~(FLOAT_STICKY_BITS_MASK | FLOAT_EXCEPTIONS_BYTE_MASK)
93 here leads to infinite SIGFPE for invalid operations, as
94 there are bits in the control register that need to be
95 cleared that are let through by that mask. -- CSR, 2002-07-16 */
96 FLOAT_TRAPS_BYTE_MASK;
98 /* FIXME: Shoot me now.
100 Hardcoded nastiness: the "0"s below refer to the first floating
101 point registers -- we should let gcc deal with that. The 8(31)
102 refers to the position on the stack, less one, of control (we
103 need for control to be the high word of the double loaded by
104 lfd; how do I know that r31 contains the stack? I don't, I'm
105 just guessing. The 255, on the other hand, is a valid constant
106 -- it says "move everything in the upper word into the floating
107 point control register. -- CSR, 2002-07-16 */
108 asm ("stw %0, 12(31); lfd 0, 8(31); mtfsf 255, 0" : : "r" (control) : "r31");
112 os_flush_icache(os_vm_address_t address, os_vm_size_t length)
115 ppc_flush_icache(address,length);