2 * This software is part of the SBCL system. See the README file for
5 * This software is derived from the CMU CL system, which was
6 * written at Carnegie Mellon University and released into the
7 * public domain. The software is in the public domain and is
8 * provided with absolutely no warranty. See the COPYING and CREDITS
9 * files for more information.
22 #include "interrupt.h"
24 #include "breakpoint.h"
27 #ifdef LISP_FEATURE_LINUX
28 extern int linux_sparc_siginfo_bug;
36 os_vm_address_t arch_get_bad_addr(int sig, siginfo_t *code, os_context_t *context)
42 pc = (unsigned int *)(*os_context_pc_addr(context));
44 /* On the sparc, we have to decode the instruction. */
46 /* Make sure it's not the pc thats bogus, and that it was lisp code */
47 /* that caused the fault. */
48 if ((unsigned long) pc & 3) {
52 if ((pc < READ_ONLY_SPACE_START ||
53 pc >= READ_ONLY_SPACE_START+READ_ONLY_SPACE_SIZE) &&
54 (pc < current_dynamic_space ||
55 pc >= current_dynamic_space + dynamic_space_size)) {
61 if ((badinst >> 30) != 3)
62 /* All load/store instructions have op = 11 (binary) */
65 rs1 = (badinst>>14)&0x1f;
67 if (badinst & (1<<13)) {
68 /* r[rs1] + simm(13) */
69 int simm13 = badinst & 0x1fff;
74 return (os_vm_address_t)
75 (*os_context_register_addr(context, rs1)+simm13);
79 int rs2 = badinst & 0x1f;
81 return (os_vm_address_t)
82 (*os_context_register_addr(context, rs1) +
83 *os_context_register_addr(context, rs2));
87 void arch_skip_instruction(os_context_t *context)
89 *os_context_pc_addr(context) = *os_context_npc_addr(context);
90 /* Note that we're doing integer arithmetic here, not pointer. So
91 * the value that the return value of os_context_npc_addr() points
92 * to will be incremented by 4, not 16.
94 *os_context_npc_addr(context) += 4;
97 unsigned char *arch_internal_error_arguments(os_context_t *context)
99 return (unsigned char *)(*os_context_pc_addr(context) + 4);
102 boolean arch_pseudo_atomic_atomic(os_context_t *context)
104 return ((*os_context_register_addr(context,reg_ALLOC)) & 4);
107 void arch_set_pseudo_atomic_interrupted(os_context_t *context)
109 *os_context_register_addr(context,reg_ALLOC) |= 1;
112 void arch_clear_pseudo_atomic_interrupted(os_context_t *context)
114 *os_context_register_addr(context,reg_ALLOC) &= ~1;
117 unsigned int arch_install_breakpoint(void *pc)
119 unsigned int *ptr = (unsigned int *)pc;
120 unsigned int result = *ptr;
121 *ptr = trap_Breakpoint;
123 os_flush_icache((os_vm_address_t) pc, sizeof(unsigned int));
128 void arch_remove_breakpoint(void *pc, unsigned int orig_inst)
130 *(unsigned int *)pc = orig_inst;
131 os_flush_icache((os_vm_address_t) pc, sizeof(unsigned int));
135 * Perform the instruction that we overwrote with a breakpoint. As we
136 * don't have a single-step facility, this means we have to:
137 * - put the instruction back
138 * - put a second breakpoint at the following instruction,
139 * set after_breakpoint and continue execution.
141 * When the second breakpoint is hit (very shortly thereafter, we hope)
142 * sigtrap_handler gets called again, but follows the AfterBreakpoint
144 * - puts a bpt back in the first breakpoint place (running across a
145 * breakpoint shouldn't cause it to be uninstalled)
146 * - replaces the second bpt with the instruction it was meant to be
151 static unsigned int *skipped_break_addr, displaced_after_inst;
152 static sigset_t orig_sigmask;
154 void arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst)
156 unsigned int *pc = (unsigned int *)(*os_context_pc_addr(context));
157 unsigned int *npc = (unsigned int *)(*os_context_npc_addr(context));
159 /* orig_sigmask = context->sigmask;
160 sigemptyset(&context->sigmask); */
162 /* FILLBLOCKSET(&context->uc_sigmask);*/
165 os_flush_icache((os_vm_address_t) pc, sizeof(unsigned int));
166 skipped_break_addr = pc;
167 displaced_after_inst = *npc;
168 *npc = trap_AfterBreakpoint;
169 os_flush_icache((os_vm_address_t) npc, sizeof(unsigned int));
173 static int pseudo_atomic_trap_p(os_context_t *context)
176 unsigned int badinst;
180 pc = (unsigned int*) *os_context_pc_addr(context);
184 /* Check to see if the current instruction is a pseudo-atomic-trap */
185 if (((badinst >> 30) == 2) && (((badinst >> 19) & 0x3f) == 0x3a)
186 && (((badinst >> 13) & 1) == 1) && ((badinst & 0x7f) == PSEUDO_ATOMIC_TRAP))
188 unsigned int previnst;
191 * Check to see if the previous instruction was an andcc alloc-tn,
192 * 3, zero-tn instruction.
194 if (((previnst >> 30) == 2) && (((previnst >> 19) & 0x3f) == 0x11)
195 && (((previnst >> 14) & 0x1f) == reg_ALLOC)
196 && (((previnst >> 25) & 0x1f) == reg_ZERO)
197 && (((previnst >> 13) & 1) == 1)
198 && ((previnst & 0x1fff) == 3))
204 fprintf(stderr, "Oops! Got a PSEUDO-ATOMIC-TRAP without a preceeding andcc!\n");
210 static void sigill_handler(int signal, siginfo_t *siginfo, void *void_context)
212 os_context_t *context = arch_os_get_context(&void_context);
213 #ifdef LISP_FEATURE_LINUX
214 /* FIXME: Check that this is necessary -- CSR, 2002-07-15 */
215 os_restore_fp_control(context);
218 if ((siginfo->si_code) == ILL_ILLOPC
219 #ifdef LISP_FEATURE_LINUX
220 || (linux_sparc_siginfo_bug && (siginfo->si_code == 2))
225 unsigned int* pc = (unsigned int*) siginfo->si_addr;
228 trap = inst & 0x3fffff;
231 case trap_PendingInterrupt:
232 arch_skip_instruction(context);
233 interrupt_handle_pending(context);
237 fake_foreign_function_call(context);
238 lose("%%primitive halt called; the party is over.\n");
242 interrupt_internal_error(signal, siginfo, context, trap == trap_Cerror);
245 case trap_Breakpoint:
246 handle_breakpoint(signal, siginfo, context);
249 case trap_FunEndBreakpoint:
250 *os_context_pc_addr(context) = (int) handle_fun_end_breakpoint(signal, siginfo, context);
251 *os_context_npc_addr(context) = *os_context_pc_addr(context) + 4;
254 case trap_AfterBreakpoint:
255 *skipped_break_addr = trap_Breakpoint;
256 os_flush_icache(skipped_break_addr, sizeof(unsigned int));
257 skipped_break_addr = NULL;
258 *(unsigned long *) os_context_pc_addr(context) = displaced_after_inst;
259 /* context->sigmask = orig_sigmask; */
260 os_flush_icache((os_vm_address_t) os_context_pc_addr(context), sizeof(unsigned int));
264 interrupt_handle_now(signal, siginfo, context);
268 else if ((siginfo->si_code) == ILL_ILLTRP
269 #ifdef LISP_FEATURE_LINUX
270 || (linux_sparc_siginfo_bug && (siginfo->si_code) == 192)
273 if (pseudo_atomic_trap_p(context)) {
274 /* A trap instruction from a pseudo-atomic. We just need
275 to fixup up alloc-tn to remove the interrupted flag,
276 skip over the trap instruction, and then handle the
277 pending interrupt(s). */
278 arch_clear_pseudo_atomic_interrupted(context);
279 arch_skip_instruction(context);
280 interrupt_handle_pending(context);
283 interrupt_internal_error(signal, siginfo, context, 0);
287 interrupt_handle_now(signal, siginfo, context);
291 static void sigemt_handler(int signal, siginfo_t *siginfo, void *void_context)
293 unsigned int badinst;
294 boolean subtract, immed;
295 int rd, rs1, op1, rs2, op2, result;
296 os_context_t *context = arch_os_get_context(&void_context);
297 #ifdef LISP_FEATURE_LINUX
298 os_restore_fp_control(context);
301 badinst = *(unsigned int *)os_context_pc_addr(context);
302 if ((badinst >> 30) != 2 || ((badinst >> 20) & 0x1f) != 0x11) {
303 /* It wasn't a tagged add. Pass the signal into lisp. */
304 interrupt_handle_now(signal, siginfo, context);
308 fprintf(stderr, "SIGEMT trap handler with tagged op instruction!\n");
310 /* Extract the parts of the inst. */
311 subtract = badinst & (1<<19);
312 rs1 = (badinst>>14) & 0x1f;
313 op1 = *os_context_register_addr(context, rs1);
315 /* If the first arg is $ALLOC then it is really a signal-pending note */
316 /* for the pseudo-atomic noise. */
317 if (rs1 == reg_ALLOC) {
318 /* Perform the op anyway. */
319 op2 = badinst & 0x1fff;
326 /* KLUDGE: this & ~7 is a little bit magical but basically
327 clears pseudo_atomic bits if any */
328 *os_context_register_addr(context, reg_ALLOC) = result & ~7;
329 arch_skip_instruction(context);
330 interrupt_handle_pending(context);
334 if ((op1 & 3) != 0) {
335 /* The first arg wan't a fixnum. */
336 interrupt_internal_error(signal, siginfo, context, 0);
340 if (immed = badinst & (1<<13)) {
341 op2 = badinst & 0x1fff;
346 rs2 = badinst & 0x1f;
347 op2 = *os_context_register_addr(context, rs2);
350 if ((op2 & 3) != 0) {
351 /* The second arg wan't a fixnum. */
352 interrupt_internal_error(signal, siginfo, context, 0);
356 rd = (badinst>>25) & 0x1f;
358 /* Don't bother computing the result unless we are going to use it. */
360 result = (op1>>2) - (op2>>2);
362 result = (op1>>2) + (op2>>2);
364 dynamic_space_free_pointer =
365 (lispobj *) *os_context_register_addr(context, reg_ALLOC);
367 *os_context_register_addr(context, rd) = alloc_number(result);
369 *os_context_register_addr(context, reg_ALLOC) =
370 (unsigned long) dynamic_space_free_pointer;
373 arch_skip_instruction(context);
376 void arch_install_interrupt_handlers()
378 undoably_install_low_level_interrupt_handler(SIGILL , sigill_handler);
379 undoably_install_low_level_interrupt_handler(SIGEMT, sigemt_handler);
383 extern lispobj call_into_lisp(lispobj fun, lispobj *args, int nargs);
385 lispobj funcall0(lispobj function)
387 lispobj *args = current_control_stack_pointer;
389 return call_into_lisp(function, args, 0);
392 lispobj funcall1(lispobj function, lispobj arg0)
394 lispobj *args = current_control_stack_pointer;
396 current_control_stack_pointer += 1;
399 return call_into_lisp(function, args, 1);
402 lispobj funcall2(lispobj function, lispobj arg0, lispobj arg1)
404 lispobj *args = current_control_stack_pointer;
406 current_control_stack_pointer += 2;
410 return call_into_lisp(function, args, 2);
413 lispobj funcall3(lispobj function, lispobj arg0, lispobj arg1, lispobj arg2)
415 lispobj *args = current_control_stack_pointer;
417 current_control_stack_pointer += 3;
422 return call_into_lisp(function, args, 3);
425 #ifdef LISP_FEATURE_LINKAGE_TABLE
427 /* This a naive port from CMUCL/sparc, which was mostly stolen from the
428 * CMUCL/x86 version, with adjustments for sparc
430 * Linkage entry size is 16, because we need at least 3 instruction to
433 * sethi %hi(addr), %g4
434 * jmpl [%g4 + %lo(addr)], %g5
437 * The Sparc V9 ABI seems to use 8 words for its jump tables. Maybe
438 * we should do the same?
442 * Define the registers to use in the linkage jump table. Can be the
443 * same. Some care must be exercised when choosing these. It has to be
444 * a register that is not otherwise being used. reg_L0 is a good
445 * choice. call_into_c trashes reg_L0 without preserving it, so we can
446 * trash it in the linkage jump table.
448 #define LINKAGE_TEMP_REG reg_L0
449 #define LINKAGE_ADDR_REG reg_L0
452 * Insert the necessary jump instructions at the given address.
455 arch_write_linkage_table_jmp(void* reloc_addr, void *target_addr)
458 * Make JMP to function entry.
460 * The instruction sequence is:
462 * sethi %hi(addr), temp_reg
463 * jmp %temp_reg + %lo(addr), %addr_reg
469 unsigned long hi; /* Top 22 bits of address */
470 unsigned long lo; /* Low 10 bits of address */
473 inst_ptr = (int*) reloc_addr;
476 * Split the target address into hi and lo parts for the sethi
477 * instruction. hi is the top 22 bits. lo is the low 10 bits.
479 hi = (unsigned long) target_addr;
484 * sethi %hi(addr), temp_reg
487 inst = (0 << 30) | (LINKAGE_TEMP_REG << 25) | (4 << 22) | hi;
491 * jmpl [temp_reg + %lo(addr)], addr_reg
494 inst = (2U << 30) | (LINKAGE_ADDR_REG << 25) | (0x38 << 19)
495 | (LINKAGE_TEMP_REG << 14) | (1 << 13) | lo;
498 /* nop (really sethi 0, %g0) */
500 inst = (0 << 30) | (0 << 25) | (4 << 22) | 0;
505 os_flush_icache((os_vm_address_t) reloc_addr, (char*) inst_ptr - (char*) reloc_addr);
509 arch_write_linkage_table_ref(void * reloc_addr, void *target_addr)
511 *(unsigned long *)reloc_addr = (unsigned long)target_addr;