X-Git-Url: http://repo.macrolet.net/gitweb/?a=blobdiff_plain;f=src%2Fcompiler%2Fx86%2Fsystem.lisp;h=ddde0261be399b40aa1d37cb8eb716275b5e80a5;hb=d306e2d23b38487488eb93881dad836e439e0c77;hp=597e3c2d9c893d758f89fafaa56655ba13fe0abf;hpb=4cb16425e2ffce3f70ad6ca10f0cde4f1545fa9d;p=sbcl.git diff --git a/src/compiler/x86/system.lisp b/src/compiler/x86/system.lisp index 597e3c2..ddde026 100644 --- a/src/compiler/x86/system.lisp +++ b/src/compiler/x86/system.lisp @@ -44,7 +44,7 @@ (inst jmp :ne done) ;; Pick off fixnums. - (inst and al-tn 3) + (inst and al-tn fixnum-tag-mask) (inst jmp :e done) ;; must be an other immediate @@ -135,17 +135,6 @@ ;; fixnum. (inst and res (lognot lowtag-mask)) (inst shr res 1))) - -(define-vop (make-other-immediate-type) - (:args (val :scs (any-reg descriptor-reg) :target res) - (type :scs (unsigned-reg immediate))) - (:results (res :scs (any-reg descriptor-reg) :from (:argument 0))) - (:generator 2 - (move res val) - (inst shl res (- n-widetag-bits 2)) - (inst or res (sc-case type - (unsigned-reg type) - (immediate (tn-value type)))))) ;;;; allocation @@ -254,6 +243,13 @@ (:generator 1 (inst break pending-interrupt-trap))) +#!+sb-safepoint +(define-vop (insert-safepoint) + (:policy :fast-safe) + (:translate sb!kernel::gc-safepoint) + (:generator 0 + (emit-safepoint))) + #!+sb-thread (defknown current-thread-offset-sap ((unsigned-byte 32)) system-area-pointer (flushable)) @@ -263,12 +259,20 @@ (:results (sap :scs (sap-reg))) (:result-types system-area-pointer) (:translate current-thread-offset-sap) - (:args (n :scs (unsigned-reg) :target sap)) + (:args (n :scs (unsigned-reg) + #!+win32 #!+win32 :to :save + #!-win32 #!-win32 :target sap)) (:arg-types unsigned-num) (:policy :fast-safe) (:generator 2 - (inst fs-segment-prefix) - (inst mov sap (make-ea :dword :disp 0 :index n :scale 4)))) + #!+win32 + (progn + ;; Note that SAP conflicts with N in this case, hence the reader + ;; conditionals above. + (inst mov sap (make-ea :dword :disp +win32-tib-arbitrary-field-offset+) :fs) + (inst mov sap (make-ea :dword :base sap :disp 0 :index n :scale 4))) + #!-win32 + (inst mov sap (make-ea :dword :disp 0 :index n :scale 4) :fs))) (define-vop (halt) (:generator 1 @@ -284,7 +288,68 @@ (note-next-instruction vop :internal-error) (inst wait))) -;;;; dynamic vop count collection support +;;;; Miscellany + +;;; the RDTSC instruction (present on Pentium processors and +;;; successors) allows you to access the time-stamp counter, a 64-bit +;;; model-specific register that counts executed cycles. The +;;; instruction returns the low cycle count in EAX and high cycle +;;; count in EDX. +;;; +;;; In order to obtain more significant results on out-of-order +;;; processors (such as the Pentium II and later), we issue a +;;; serializing CPUID instruction before reading the cycle counter. +;;; This instruction is used for its side effect of emptying the +;;; processor pipeline, to ensure that the RDTSC instruction is +;;; executed once all pending instructions have been completed. +;;; CPUID writes to EBX and ECX in addition to EAX and EDX, so +;;; they need to be added as temporaries. +;;; +;;; Note that cache effects mean that the cycle count can vary for +;;; different executions of the same code (it counts cycles, not +;;; retired instructions). Furthermore, the results are per-processor +;;; and not per-process, so are unreliable on multiprocessor machines +;;; where processes can migrate between processors. +;;; +;;; This method of obtaining a cycle count has the advantage of being +;;; very fast (around 20 cycles), and of not requiring a system call. +;;; However, you need to know your processor's clock speed to translate +;;; this into real execution time. +;;; +;;; FIXME: This about the WITH-CYCLE-COUNTER interface a bit, and then +;;; perhaps export it from SB-SYS. + +(defknown %read-cycle-counter () (values (unsigned-byte 32) (unsigned-byte 32)) ()) + +(define-vop (%read-cycle-counter) + (:policy :fast-safe) + (:translate %read-cycle-counter) + (:temporary (:sc unsigned-reg :offset eax-offset :target lo) eax) + (:temporary (:sc unsigned-reg :offset edx-offset :target hi) edx) + (:temporary (:sc unsigned-reg :offset ebx-offset) ebx) + (:temporary (:sc unsigned-reg :offset ecx-offset) ecx) + (:ignore ebx ecx) + (:results (hi :scs (unsigned-reg)) + (lo :scs (unsigned-reg))) + (:result-types unsigned-num unsigned-num) + (:generator 5 + (inst xor eax eax) + ;; Intel docs seem quite consistent on only using CPUID before RDTSC, + ;; not both before and after. Go figure. + (inst cpuid) + (inst rdtsc) + (move lo eax) + (move hi edx))) + +(defmacro with-cycle-counter (&body body) + "Returns the primary value of BODY as the primary value, and the +number of CPU cycles elapsed as secondary value. EXPERIMENTAL." + (with-unique-names (hi0 hi1 lo0 lo1) + `(multiple-value-bind (,hi0 ,lo0) (%read-cycle-counter) + (values (locally ,@body) + (multiple-value-bind (,hi1 ,lo1) (%read-cycle-counter) + (+ (ash (- ,hi1 ,hi0) 32) + (- ,lo1 ,lo0))))))) #!+sb-dyncount (define-vop (count-me) @@ -292,3 +357,42 @@ (:info index) (:generator 0 (inst inc (make-ea-for-vector-data count-vector :offset index)))) + +;;;; Memory barrier support + +#!+memory-barrier-vops +(define-vop (%compiler-barrier) + (:policy :fast-safe) + (:translate %compiler-barrier) + (:generator 3)) + +#!+memory-barrier-vops +(define-vop (%memory-barrier) + (:policy :fast-safe) + (:translate %memory-barrier) + (:generator 3 + (inst add (make-ea :dword :base esp-tn) 0 :lock))) + +#!+memory-barrier-vops +(define-vop (%read-barrier) + (:policy :fast-safe) + (:translate %read-barrier) + (:generator 3)) + +#!+memory-barrier-vops +(define-vop (%write-barrier) + (:policy :fast-safe) + (:translate %write-barrier) + (:generator 3)) + +#!+memory-barrier-vops +(define-vop (%data-dependency-barrier) + (:policy :fast-safe) + (:translate %data-dependency-barrier) + (:generator 3)) + +(define-vop (pause) + (:translate spin-loop-hint) + (:policy :fast-safe) + (:generator 0 + (inst pause)))