X-Git-Url: http://repo.macrolet.net/gitweb/?a=blobdiff_plain;f=src%2Fruntime%2Fmips-arch.c;h=125e163312bc399091352d31c9220e53f741287b;hb=5e92e9ed61903658015c2a75c79a32ad41dbd29d;hp=1d64f7649a53f1f57bb55da60f3d61d6a4b1d17f;hpb=79cc569a97e444389350ea3f5b1017374fe16bec;p=sbcl.git diff --git a/src/runtime/mips-arch.c b/src/runtime/mips-arch.c index 1d64f76..125e163 100644 --- a/src/runtime/mips-arch.c +++ b/src/runtime/mips-arch.c @@ -23,6 +23,8 @@ #include "genesis/constants.h" +#define INSN_LEN 4 + void arch_init() { @@ -35,9 +37,85 @@ arch_get_bad_addr(int signam, siginfo_t *siginfo, os_context_t *context) /* Classic CMUCL comment: Finding the bad address on the mips is easy. */ - return (os_vm_address_t) siginfo->si_addr; + return (os_vm_address_t)siginfo->si_addr; +} + +static inline unsigned int +os_context_register(os_context_t *context, int offset) +{ + return (unsigned int)(*os_context_register_addr(context, offset)); +} + +static inline unsigned int +os_context_pc(os_context_t *context) +{ + return (unsigned int)(*os_context_pc_addr(context)); +} + +static inline unsigned int +os_context_insn(os_context_t *context) +{ + if (os_context_bd_cause(context)) + return *(unsigned int *)(os_context_pc(context) + INSN_LEN); + else + return *(unsigned int *)(os_context_pc(context)); +} + +boolean +arch_insn_with_bdelay_p(unsigned int insn) +{ + switch (insn >> 26) { + case 0x0: + switch (insn & 0x3f) { + /* register jumps */ + case 0x08: + case 0x09: + return 1; + } + break; + /* branches and immediate jumps */ + case 0x1: + switch ((insn >> 16) & 0x1f) { + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x10: + case 0x11: + case 0x12: + case 0x13: + return 1; + } + break; + case 0x2: + case 0x3: + case 0x4: + case 0x5: + case 0x6: + case 0x7: + return 1; + case 0x10: + case 0x11: + case 0x12: + switch ((insn >> 21) & 0x1f) { + /* CP0/CP1/CP2 branches */ + case 0x08: + return 1; + } + break; + /* branch likely (MIPS II) */ + case 0x14: + case 0x15: + case 0x16: + case 0x17: + return 1; + } + return 0; } +/* This function is somewhat misnamed, it actually just jumps to the + correct target address without attempting to execute the delay slot. + For other instructions it just increments the returned PC value. */ static unsigned int emulate_branch(os_context_t *context, unsigned int inst) { @@ -46,64 +124,69 @@ emulate_branch(os_context_t *context, unsigned int inst) unsigned int r2 = (inst >> 16) & 0x1f; unsigned int r3 = (inst >> 11) & 0x1f; unsigned int disp = ((inst&(1<<15)) ? inst | (-1 << 16) : inst&0x7fff) << 2; - unsigned int jtgt = (*os_context_pc_addr(context) & ~0x0fffffff) | (inst&0x3ffffff) << 2; - unsigned int tgt = *os_context_pc_addr(context); + unsigned int jtgt = (os_context_pc(context) & ~0x0fffffff) | (inst&0x3ffffff) << 2; + unsigned int tgt = os_context_pc(context); switch(opcode) { case 0x0: /* jr, jalr */ switch(inst & 0x3f) { case 0x08: /* jr */ - tgt = *os_context_register_addr(context, r1); + tgt = os_context_register(context, r1); break; case 0x09: /* jalr */ - tgt = *os_context_register_addr(context, r1); + tgt = os_context_register(context, r1); *os_context_register_addr(context, r3) - = *os_context_pc_addr(context) + 4; + = os_context_pc(context) + INSN_LEN; + break; + default: + tgt += INSN_LEN; break; } break; case 0x1: /* bltz, bgez, bltzal, bgezal */ switch((inst >> 16) & 0x1f) { case 0x00: /* bltz */ - if(*os_context_register_addr(context, r1) < 0) + if(os_context_register(context, r1) < 0) tgt += disp; break; case 0x01: /* bgez */ - if(*os_context_register_addr(context, r1) >= 0) + if(os_context_register(context, r1) >= 0) tgt += disp; break; case 0x10: /* bltzal */ - if(*os_context_register_addr(context, r1) < 0) + if(os_context_register(context, r1) < 0) tgt += disp; *os_context_register_addr(context, 31) - = *os_context_pc_addr(context) + 4; + = os_context_pc(context) + INSN_LEN; break; case 0x11: /* bgezal */ - if(*os_context_register_addr(context, r1) >= 0) + if(os_context_register(context, r1) >= 0) tgt += disp; *os_context_register_addr(context, 31) - = *os_context_pc_addr(context) + 4; + = os_context_pc(context) + INSN_LEN; + break; + default: /* conditional branches/traps for > MIPS I, ignore for now. */ break; } break; case 0x4: /* beq */ - if(*os_context_register_addr(context, r1) - == *os_context_register_addr(context, r2)) + if(os_context_register(context, r1) + == os_context_register(context, r2)) tgt += disp; break; case 0x5: /* bne */ - if(*os_context_register_addr(context, r1) - != *os_context_register_addr(context, r2)) + if(os_context_register(context, r1) + != os_context_register(context, r2)) tgt += disp; break; case 0x6: /* blez */ - if(*os_context_register_addr(context, r1) - <= *os_context_register_addr(context, r2)) + if(os_context_register(context, r1) + <= os_context_register(context, r2)) tgt += disp; break; case 0x7: /* bgtz */ - if(*os_context_register_addr(context, r1) - > *os_context_register_addr(context, r2)) + if(os_context_register(context, r1) + > os_context_register(context, r2)) tgt += disp; break; case 0x2: /* j */ @@ -112,7 +195,10 @@ emulate_branch(os_context_t *context, unsigned int inst) case 0x3: /* jal */ tgt = jtgt; *os_context_register_addr(context, 31) - = *os_context_pc_addr(context) + 4; + = os_context_pc(context) + INSN_LEN; + break; + default: + tgt += 4; break; } return tgt; @@ -121,34 +207,27 @@ emulate_branch(os_context_t *context, unsigned int inst) void arch_skip_instruction(os_context_t *context) { - /* Skip the offending instruction */ - if (os_context_bd_cause(context)) { - /* Currently, we never get here, because Linux' support for - bd_cause seems not terribly solid (c.f os_context_bd_cause - in mips-linux-os.c). If a port to Irix comes along, this - code will be executed, because presumably Irix' support is - better (it can hardly be worse). We lose() to remind the - porter to review this code. -- CSR, 2002-09-06 */ - lose("bd_cause branch taken; review code for new OS?\n"); - *os_context_pc_addr(context) - = emulate_branch(context, *os_context_pc_addr(context)); - } else - *os_context_pc_addr(context) += 4; + /* Skip the offending instruction. Don't use os_context_insn here, + since in case of a branch we want the branch insn, not the delay + slot. */ + *os_context_pc_addr(context) + = emulate_branch(context, + *(unsigned int *)(os_context_pc(context))); } unsigned char * arch_internal_error_arguments(os_context_t *context) { if (os_context_bd_cause(context)) - return (unsigned char *)(*os_context_pc_addr(context) + 8); + return (unsigned char *)(os_context_pc(context) + (INSN_LEN * 2)); else - return (unsigned char *)(*os_context_pc_addr(context) + 4); + return (unsigned char *)(os_context_pc(context) + INSN_LEN); } boolean arch_pseudo_atomic_atomic(os_context_t *context) { - return *os_context_register_addr(context, reg_ALLOC) & 1; + return os_context_register(context, reg_ALLOC) & 1; } void @@ -161,10 +240,16 @@ unsigned long arch_install_breakpoint(void *pc) { unsigned int *ptr = (unsigned int *)pc; - unsigned long result = (unsigned long) *ptr; + unsigned int insn = *ptr; + unsigned long result; + /* Don't install over a branch/jump with delay slot. */ + if (arch_insn_with_bdelay_p(insn)) + ptr++; + + result = (unsigned long)insn; *ptr = (trap_Breakpoint << 16) | 0xd; - os_flush_icache((os_vm_address_t)ptr, sizeof(unsigned int)); + os_flush_icache((os_vm_address_t)ptr, INSN_LEN); return result; } @@ -175,7 +260,7 @@ arch_remove_breakpoint(void *pc, unsigned long orig_inst) unsigned int *ptr = (unsigned int *)pc; *ptr = (unsigned int) orig_inst; - os_flush_icache((os_vm_address_t)ptr, sizeof(unsigned int)); + os_flush_icache((os_vm_address_t)ptr, INSN_LEN); } static unsigned int *skipped_break_addr, displaced_after_inst; @@ -184,10 +269,9 @@ static sigset_t orig_sigmask; void arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst) { - unsigned int *pc = (unsigned int *)*os_context_pc_addr(context); + unsigned int *pc = (unsigned int *)os_context_pc(context); unsigned int *break_pc, *next_pc; unsigned int next_inst; - int opcode; orig_sigmask = *os_context_sigmask_addr(context); sigaddset_blockable(os_context_sigmask_addr(context)); @@ -196,8 +280,7 @@ arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst) if (os_context_bd_cause(context)) { break_pc = pc+1; next_inst = *pc; - } - else { + } else { break_pc = pc; next_inst = orig_inst; } @@ -207,31 +290,16 @@ arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst) skipped_break_addr = break_pc; /* Figure out where it goes. */ - opcode = next_inst >> 26; - if (opcode == 1 || ((opcode & 0x3c) == 0x4) || ((next_inst & 0xf00e0000) == 0x80000000)) - next_pc = (unsigned int *)emulate_branch(context, next_inst); - else - next_pc = pc+1; + next_pc = (unsigned int *)emulate_branch(context, next_inst); displaced_after_inst = arch_install_breakpoint(next_pc); } static void -sigill_handler(int signal, siginfo_t *info, void *void_context) -{ - os_context_t *context = arch_os_get_context(&void_context); - - fake_foreign_function_call(context); - monitor_or_something(); -} - -static void sigtrap_handler(int signal, siginfo_t *info, void *void_context) { os_context_t *context = arch_os_get_context(&void_context); - unsigned int code; - - code = ((*(int *) (*os_context_pc_addr(context))) >> 16) & 0x1f; + unsigned int code = (os_context_insn(context) >> 16) & 0x1f; switch (code) { case trap_Halt: @@ -245,7 +313,7 @@ sigtrap_handler(int signal, siginfo_t *info, void *void_context) case trap_Error: case trap_Cerror: - interrupt_internal_error(signal, info, context, code==trap_Cerror); + interrupt_internal_error(signal, info, context, code == trap_Cerror); break; case trap_Breakpoint: @@ -253,8 +321,9 @@ sigtrap_handler(int signal, siginfo_t *info, void *void_context) break; case trap_FunEndBreakpoint: - *os_context_pc_addr(context) = (int)handle_fun_end_breakpoint(signal, info, context); - os_flush_icache((os_vm_address_t)*os_context_pc_addr(context), sizeof(unsigned int)); + *os_context_pc_addr(context) + = (os_context_register_t)(unsigned int) + handle_fun_end_breakpoint(signal, info, context); break; case trap_AfterBreakpoint: @@ -281,16 +350,11 @@ sigtrap_handler(int signal, siginfo_t *info, void *void_context) static void sigfpe_handler(int signal, siginfo_t *info, void *void_context) { - unsigned int bad_inst; + os_context_t *context = arch_os_get_context(&void_context); + unsigned int bad_inst = os_context_insn(context); unsigned int op, rs, rt, rd, funct, dest = 32; int immed; - unsigned int result; - os_context_t *context = arch_os_get_context(&void_context); - - if (os_context_bd_cause(context)) - bad_inst = *(unsigned int *)(*os_context_pc_addr(context) + 4); - else - bad_inst = *(unsigned int *)(*os_context_pc_addr(context)); + int result; op = (bad_inst >> 26) & 0x3f; rs = (bad_inst >> 21) & 0x1f; @@ -303,56 +367,48 @@ sigfpe_handler(int signal, siginfo_t *info, void *void_context) case 0x0: /* SPECIAL */ switch (funct) { case 0x20: /* ADD */ - /* FIXME: Hopefully, this whole section can just go away, - with the rewrite of pseudo-atomic and the deletion of - overflow VOPs */ - /* Check to see if this is really a pa_interrupted hit */ - if (rs == reg_ALLOC && rt == reg_NL4) { - *os_context_register_addr(context, reg_ALLOC) - += *os_context_register_addr(context, reg_NL4) &= ~(-1LL<<31); - arch_skip_instruction(context); - interrupt_handle_pending(context); - return; - } - result = FIXNUM_VALUE(*os_context_register_addr(context, rs)) - + FIXNUM_VALUE(*os_context_register_addr(context, rt)); + result = FIXNUM_VALUE(os_context_register(context, rs)) + + FIXNUM_VALUE(os_context_register(context, rt)); dest = rd; break; case 0x22: /* SUB */ - result = FIXNUM_VALUE(*os_context_register_addr(context, rs)) - - FIXNUM_VALUE(*os_context_register_addr(context, rt)); + result = FIXNUM_VALUE(os_context_register(context, rs)) + - FIXNUM_VALUE(os_context_register(context, rt)); dest = rd; break; + + default: + interrupt_handle_now(signal, info, context); + return; } break; case 0x8: /* ADDI */ - result = FIXNUM_VALUE(*os_context_register_addr(context,rs)) + (immed>>2); + result = FIXNUM_VALUE(os_context_register(context,rs)) + + (immed >> N_FIXNUM_TAG_BITS); dest = rt; break; - } - if (dest < 32) { - dynamic_space_free_pointer = - (lispobj *) *os_context_register_addr(context,reg_ALLOC); + default: + interrupt_handle_now(signal, info, context); + return; + } - *os_context_register_addr(context,dest) = alloc_number(result); + dynamic_space_free_pointer = + (lispobj *)(unsigned int)*os_context_register_addr(context,reg_ALLOC); - *os_context_register_addr(context, reg_ALLOC) = - (unsigned int) dynamic_space_free_pointer; + *os_context_register_addr(context,dest) = alloc_number(result); - arch_skip_instruction(context); + *os_context_register_addr(context, reg_ALLOC) = + (unsigned int) dynamic_space_free_pointer; - } - else - interrupt_handle_now(signal, info, context); + arch_skip_instruction(context); } void arch_install_interrupt_handlers() { - undoably_install_low_level_interrupt_handler(SIGILL,sigill_handler); undoably_install_low_level_interrupt_handler(SIGTRAP,sigtrap_handler); undoably_install_low_level_interrupt_handler(SIGFPE,sigfpe_handler); }