X-Git-Url: http://repo.macrolet.net/gitweb/?a=blobdiff_plain;f=src%2Fruntime%2Fppc-linux-os.c;h=07124f11c4a56d023c804e2a10bce159eb119496;hb=58513220fcf87e161a5e0d3fbadd76c45f27d584;hp=00378f7b32e1bb01dc088db943d6faf06f897e89;hpb=9f10bc102adce15a820027777a03e49a7b7623da;p=sbcl.git

diff --git a/src/runtime/ppc-linux-os.c b/src/runtime/ppc-linux-os.c
index 00378f7..07124f1 100644
--- a/src/runtime/ppc-linux-os.c
+++ b/src/runtime/ppc-linux-os.c
@@ -18,6 +18,7 @@
 #include <stdio.h>
 #include <sys/param.h>
 #include <sys/file.h>
+#include "sbcl.h"
 #include "./signal.h"
 #include "os.h"
 #include "arch.h"
@@ -25,7 +26,6 @@
 #include "interrupt.h"
 #include "interr.h"
 #include "lispregs.h"
-#include "sbcl.h"
 #include <sys/socket.h>
 #include <sys/utsname.h>
 
@@ -36,30 +36,55 @@
 #include <unistd.h>
 
 #include "validate.h"
+#include "ppc-linux-mcontext.h"
+
 size_t os_vm_page_size;
 
+int arch_os_thread_init(struct thread *thread) {
+    return 1;                   /* success */
+}
+int arch_os_thread_cleanup(struct thread *thread) {
+    return 1;                   /* success */
+}
+
 os_context_register_t   *
 os_context_register_addr(os_context_t *context, int offset)
 {
+#if defined(GLIBC231_STYLE_UCONTEXT)
     return &((context->uc_mcontext.regs)->gpr[offset]);
+#elif defined(GLIBC232_STYLE_UCONTEXT)
+    return &((context->uc_mcontext.uc_regs->gregs)[offset]);
+#endif
 }
 
 os_context_register_t *
 os_context_pc_addr(os_context_t *context)
 {
+#if defined(GLIBC231_STYLE_UCONTEXT)
     return &((context->uc_mcontext.regs)->nip);
+#elif defined(GLIBC232_STYLE_UCONTEXT)
+    return &((context->uc_mcontext.uc_regs->gregs)[PT_NIP]);
+#endif
 }
 
 os_context_register_t *
 os_context_lr_addr(os_context_t *context)
 {
+#if defined(GLIBC231_STYLE_UCONTEXT)
     return &((context->uc_mcontext.regs)->link);
+#elif defined(GLIBC232_STYLE_UCONTEXT)
+    return &((context->uc_mcontext.uc_regs->gregs)[PT_LNK]);
+#endif
 }
 
 sigset_t *
 os_context_sigmask_addr(os_context_t *context)
 {
+#if defined(GLIBC231_STYLE_UCONTEXT)
     return &context->uc_sigmask;
+#elif defined(GLIBC232_STYLE_UCONTEXT)
+    return &context->uc_sigmask;
+#endif
 }
 
 unsigned long
@@ -70,40 +95,42 @@ os_context_fp_control(os_context_t *context)
        registers, and PT_FPSCR is an offset that is larger than 32
        (the number of ppc registers), but that happens to get the
        right answer. -- CSR, 2002-07-11 */
-    return context->uc_mcontext.regs->gpr[PT_FPSCR]; 
+#if defined(GLIBC231_STYLE_UCONTEXT)
+    return context->uc_mcontext.regs->gpr[PT_FPSCR];
+#elif defined(GLIBC232_STYLE_UCONTEXT)
+    return context->uc_mcontext.uc_regs->gregs[PT_FPSCR];
+#endif
 }
 
-void 
+void
 os_restore_fp_control(os_context_t *context)
 {
     unsigned long control;
-    
-    control = os_context_fp_control(context) & 
-      /* FIXME: Should we preserve the user's requested rounding mode?
-
-         Note that doing 
-
-	 ~(FLOAT_STICKY_BITS_MASK | FLOAT_EXCEPTIONS_BYTE_MASK)
-
-	 here leads to infinite SIGFPE for invalid operations, as
-	 there are bits in the control register that need to be
-	 cleared that are let through by that mask. -- CSR, 2002-07-16 */
-      FLOAT_TRAPS_BYTE_MASK;
-    
-    /* FIXME: Shoot me now.
-       
-       Hardcoded nastiness: the "0"s below refer to the first floating
-       point registers -- we should let gcc deal with that. The 8(31)
-       refers to the position on the stack, less one, of control (we
-       need for control to be the high word of the double loaded by
-       lfd; how do I know that r31 contains the stack? I don't, I'm
-       just guessing. The 255, on the other hand, is a valid constant
-       -- it says "move everything in the upper word into the floating
-       point control register. -- CSR, 2002-07-16 */
-    asm ("stw %0, 12(31); lfd 0, 8(31); mtfsf 255, 0" : : "r" (control) : "r31");
+    double d;
+
+    control = os_context_fp_control(context) &
+        /* FIXME: Should we preserve the user's requested rounding mode?
+
+        Note that doing
+
+        ~(FLOAT_STICKY_BITS_MASK | FLOAT_EXCEPTIONS_BYTE_MASK)
+
+        here leads to infinite SIGFPE for invalid operations, as
+        there are bits in the control register that need to be
+        cleared that are let through by that mask. -- CSR, 2002-07-16 */
+
+        FLOAT_TRAPS_BYTE_MASK;
+
+    d = *((double *) &control);
+    /* Hmp.  Apparently the following doesn't work either:
+
+    asm volatile ("mtfsf 0xff,%0" : : "f" (d));
+
+    causing segfaults at the first GC.
+    */
 }
 
-void 
+void
 os_flush_icache(os_vm_address_t address, os_vm_size_t length)
 {
     /* see ppc-arch.c */