X-Git-Url: http://repo.macrolet.net/gitweb/?a=blobdiff_plain;f=src%2Fruntime%2Fppc-linux-os.c;h=07124f11c4a56d023c804e2a10bce159eb119496;hb=e4542bc034db18cf98f005b2dac53a6d7d5c7260;hp=86c2baefde0d6f15c6e1b0414536d8670a22221c;hpb=78e261f4ad7a0f3a0cf805ecc0052f0ccbf8fcd0;p=sbcl.git diff --git a/src/runtime/ppc-linux-os.c b/src/runtime/ppc-linux-os.c index 86c2bae..07124f1 100644 --- a/src/runtime/ppc-linux-os.c +++ b/src/runtime/ppc-linux-os.c @@ -18,6 +18,7 @@ #include #include #include +#include "sbcl.h" #include "./signal.h" #include "os.h" #include "arch.h" @@ -25,7 +26,6 @@ #include "interrupt.h" #include "interr.h" #include "lispregs.h" -#include "sbcl.h" #include #include @@ -41,10 +41,10 @@ size_t os_vm_page_size; int arch_os_thread_init(struct thread *thread) { - return 1; /* success */ + return 1; /* success */ } int arch_os_thread_cleanup(struct thread *thread) { - return 1; /* success */ + return 1; /* success */ } os_context_register_t * @@ -96,41 +96,41 @@ os_context_fp_control(os_context_t *context) (the number of ppc registers), but that happens to get the right answer. -- CSR, 2002-07-11 */ #if defined(GLIBC231_STYLE_UCONTEXT) - return context->uc_mcontext.regs->gpr[PT_FPSCR]; + return context->uc_mcontext.regs->gpr[PT_FPSCR]; #elif defined(GLIBC232_STYLE_UCONTEXT) - return context->uc_mcontext.uc_regs->gregs[PT_FPSCR]; + return context->uc_mcontext.uc_regs->gregs[PT_FPSCR]; #endif } -void +void os_restore_fp_control(os_context_t *context) { unsigned long control; double d; - - control = os_context_fp_control(context) & - /* FIXME: Should we preserve the user's requested rounding mode? - - Note that doing - - ~(FLOAT_STICKY_BITS_MASK | FLOAT_EXCEPTIONS_BYTE_MASK) - - here leads to infinite SIGFPE for invalid operations, as - there are bits in the control register that need to be - cleared that are let through by that mask. -- CSR, 2002-07-16 */ - - FLOAT_TRAPS_BYTE_MASK; - + + control = os_context_fp_control(context) & + /* FIXME: Should we preserve the user's requested rounding mode? + + Note that doing + + ~(FLOAT_STICKY_BITS_MASK | FLOAT_EXCEPTIONS_BYTE_MASK) + + here leads to infinite SIGFPE for invalid operations, as + there are bits in the control register that need to be + cleared that are let through by that mask. -- CSR, 2002-07-16 */ + + FLOAT_TRAPS_BYTE_MASK; + d = *((double *) &control); /* Hmp. Apparently the following doesn't work either: - + asm volatile ("mtfsf 0xff,%0" : : "f" (d)); causing segfaults at the first GC. */ } -void +void os_flush_icache(os_vm_address_t address, os_vm_size_t length) { /* see ppc-arch.c */