X-Git-Url: http://repo.macrolet.net/gitweb/?a=blobdiff_plain;f=src%2Fruntime%2Fx86-64-arch.h;h=81ac4b77a779cc8300cfbfbfe8bccc968944e126;hb=3a340441c36832861f53fc16478607ea8ab5cb2e;hp=4c5d1a7b0a9798c5328900a2c81d326ce4e54b6a;hpb=4d633465231c79adeb3e4e59bf30c011d1d0e9dd;p=sbcl.git

diff --git a/src/runtime/x86-64-arch.h b/src/runtime/x86-64-arch.h
index 4c5d1a7..81ac4b7 100644
--- a/src/runtime/x86-64-arch.h
+++ b/src/runtime/x86-64-arch.h
@@ -18,10 +18,11 @@
  * here? (The answer wasn't obvious to me when merging the
  * architecture-abstracting patches for CSR's SPARC port. -- WHN 2002-02-15) */
 
-#include "interr.h"
+#define COMPILER_BARRIER \
+    do { __asm__ __volatile__ ( "" : : : "memory"); } while (0)
 
 static inline void
-get_spinlock(volatile lispobj *word,long value)
+get_spinlock(volatile lispobj *word, unsigned long value)
 {
 #ifdef LISP_FEATURE_SB_THREAD
     u64 rax=0;
@@ -52,7 +53,10 @@ get_spinlock(volatile lispobj *word,long value)
 static inline void
 release_spinlock(volatile lispobj *word)
 {
+    /* See comment in RELEASE-SPINLOCK in target-thread.lisp. */
+    COMPILER_BARRIER;
     *word=0;
+    COMPILER_BARRIER;
 }
 
 static inline lispobj