X-Git-Url: http://repo.macrolet.net/gitweb/?a=blobdiff_plain;f=src%2Fruntime%2Fx86-64-arch.h;h=fe764f64288445d27f521f4b6d9ed1ccfafa8a19;hb=c8617f57d0413beb2890e94dabe227cef9c5ddad;hp=10df5d85c779584592a69193255c5d77bb060026;hpb=4023b1bec2412344e5eea4a33cd85dd662149c67;p=sbcl.git

diff --git a/src/runtime/x86-64-arch.h b/src/runtime/x86-64-arch.h
index 10df5d8..fe764f6 100644
--- a/src/runtime/x86-64-arch.h
+++ b/src/runtime/x86-64-arch.h
@@ -18,10 +18,11 @@
  * here? (The answer wasn't obvious to me when merging the
  * architecture-abstracting patches for CSR's SPARC port. -- WHN 2002-02-15) */
 
-#include "interr.h"
+#define COMPILER_BARRIER \
+    do { __asm__ __volatile__ ( "" : : : "memory"); } while (0)
 
 static inline void
-get_spinlock(volatile lispobj *word,long value)
+get_spinlock(volatile lispobj *word, unsigned long value)
 {
 #ifdef LISP_FEATURE_SB_THREAD
     u64 rax=0;
@@ -29,13 +30,15 @@ get_spinlock(volatile lispobj *word,long value)
         lose("recursive get_spinlock: 0x%x,%ld\n",word,value);
     do {
 #if defined(LISP_FEATURE_DARWIN)
-        asm ("xor %0,%0\n\
+        asm volatile
+            ("xor %0,%0\n\
               lock/cmpxchg %1,%2"
              : "=a" (rax)
              : "r" (value), "m" (*word)
              : "memory", "cc");
 #else
-        asm ("xor %0,%0\n\
+        asm volatile
+            ("xor %0,%0\n\
               lock cmpxchg %1,%2"
              : "=a" (rax)
              : "r" (value), "m" (*word)
@@ -50,18 +53,24 @@ get_spinlock(volatile lispobj *word,long value)
 static inline void
 release_spinlock(volatile lispobj *word)
 {
+    /* See comment in RELEASE-SPINLOCK in target-thread.lisp. */
+    COMPILER_BARRIER;
     *word=0;
+    COMPILER_BARRIER;
 }
 
 static inline lispobj
 swap_lispobjs(volatile lispobj *dest, lispobj value)
 {
     lispobj old_value;
-    asm ("lock xchg %0,(%1)"
+    asm volatile
+        ("lock xchg %0,(%1)"
          : "=r" (old_value)
          : "r" (dest), "0" (value)
          : "memory");
     return old_value;
 }
 
+extern void AMD64_SYSV_ABI fast_bzero(void *, size_t);
+
 #endif /* _X86_64_ARCH_H */