X-Git-Url: http://repo.macrolet.net/gitweb/?a=blobdiff_plain;f=src%2Fruntime%2Fx86-arch.h;h=1200ef1435578ad196bda0a0be0f7535799360bd;hb=0285aa5ff8416027932daa001b84429be2ca559b;hp=1a51e6b43162bab7a7279071ac756af84b5bd4cd;hpb=4d633465231c79adeb3e4e59bf30c011d1d0e9dd;p=sbcl.git diff --git a/src/runtime/x86-arch.h b/src/runtime/x86-arch.h index 1a51e6b..1200ef1 100644 --- a/src/runtime/x86-arch.h +++ b/src/runtime/x86-arch.h @@ -18,7 +18,8 @@ * here? (The answer wasn't obvious to me when merging the * architecture-abstracting patches for CSR's SPARC port. -- WHN 2002-02-15) */ -#include "interr.h" +#define COMPILER_BARRIER \ + do { __asm__ __volatile__ ( "" : : : "memory"); } while (0) static inline void get_spinlock(volatile lispobj *word, unsigned long value) @@ -51,11 +52,12 @@ get_spinlock(volatile lispobj *word, unsigned long value) static inline void release_spinlock(volatile lispobj *word) { + /* See comment in RELEASE-SPINLOCK in target-thread.lisp. */ + COMPILER_BARRIER; *word=0; + COMPILER_BARRIER; } -#include - static inline lispobj swap_lispobjs(volatile lispobj *dest, lispobj value) {