3 #ifdef LANGUAGE_ASSEMBLY
4 #define REG(num) $ ## num
11 #define reg_ZERO REG(0)
12 #define reg_NL3 REG(1)
13 #define reg_CFUNC REG(2)
14 #define reg_NL4 REG(3)
15 #define reg_NL0 REG(4)
16 #define reg_NL1 REG(5)
17 #define reg_NL2 REG(6)
18 #define reg_NARGS REG(7)
21 #define reg_A2 REG(10)
22 #define reg_A3 REG(11)
23 #define reg_A4 REG(12)
24 #define reg_A5 REG(13)
25 #define reg_FDEFN REG(14)
26 #define reg_LEXENV REG(15)
27 #define reg_NFP REG(16)
28 #define reg_OCFP REG(17)
29 #define reg_LRA REG(18)
30 #define reg_L0 REG(19)
31 #define reg_NIL REG(20)
32 #define reg_BSP REG(21)
33 #define reg_CFP REG(22)
34 #define reg_CSP REG(23)
35 #define reg_L1 REG(24)
36 #define reg_ALLOC REG(25)
37 #define reg_NSP REG(29)
38 #define reg_CODE REG(30)
39 #define reg_LIP REG(31)
42 "ZERO", "NL3", "CFUNC", "NL4", \
43 "NL0", "NL1", "NL2", "NARGS", \
44 "A0", "A1", "A2", "A3", \
45 "A4", "A5", "FDEFN", "LEXENV", \
46 "NFP", "OCFP", "LRA", "L0", \
47 "NIL", "BSP", "CFP", "CSP", \
48 "L1", "ALLOC", "K0", "K1", \
49 "GP", "NSP", "CODE", "LIP"
52 #define BOXED_REGISTERS { \
53 reg_A0, reg_A1, reg_A2, reg_A3, reg_A4, reg_A5, reg_FDEFN, reg_LEXENV, \
54 reg_NFP, reg_OCFP, reg_LRA, reg_L0, reg_L1, reg_CODE \
57 #define SC_REG(sc, n) ((sc)->sc_regs[n])
58 #define SC_PC(sc) ((sc)->sc_pc)