10 #include "interrupt.h"
13 /* The header files may not define PT_DAR/PT_DSISR. This definition
14 is correct for all versions of ppc linux >= 2.0.30
16 As of DR2.1u4, MkLinux doesn't pass these registers to signal
17 handlers correctly; a patch is necessary in order to (partially)
20 Even with the patch, the DSISR may not have its 'write' bit set
21 correctly (it tends not to be set if the fault was caused by
22 something other than a protection violation.)
38 arch_get_bad_addr(int sig, siginfo_t *code, os_context_t *context)
40 unsigned int *pc = (unsigned int *)(*os_context_pc_addr(context));
44 /* Make sure it's not the pc thats bogus, and that it was lisp code */
45 /* that caused the fault. */
46 if ((((unsigned long)pc) & 3) != 0 ||
47 ((pc < READ_ONLY_SPACE_START ||
48 pc >= READ_ONLY_SPACE_START+READ_ONLY_SPACE_SIZE) &&
49 ((lispobj *)pc < current_dynamic_space ||
50 (lispobj *)pc >= current_dynamic_space + DYNAMIC_SPACE_SIZE)))
54 addr = (os_vm_address_t) (*os_context_register_addr(context,PT_DAR));
60 arch_skip_instruction(os_context_t *context)
62 ((char*)*os_context_pc_addr(context)) +=4;
66 arch_internal_error_arguments(os_context_t *context)
68 return (unsigned char *)(*os_context_pc_addr(context)+4);
73 arch_pseudo_atomic_atomic(os_context_t *context)
75 return ((*os_context_register_addr(context,reg_ALLOC)) & 4);
78 #define PSEUDO_ATOMIC_INTERRUPTED_BIAS 0x7f000000
81 arch_set_pseudo_atomic_interrupted(os_context_t *context)
83 *os_context_register_addr(context,reg_NL3)
84 += PSEUDO_ATOMIC_INTERRUPTED_BIAS;
88 arch_install_breakpoint(void *pc)
90 unsigned long *ptr = (unsigned long *)pc;
91 unsigned long result = *ptr;
92 *ptr = (3<<26) | (5 << 21) | trap_Breakpoint;
93 os_flush_icache((os_vm_address_t) pc, sizeof(unsigned long));
98 arch_remove_breakpoint(void *pc, unsigned long orig_inst)
100 *(unsigned long *)pc = orig_inst;
101 os_flush_icache((os_vm_address_t) pc, sizeof(unsigned long));
104 static unsigned long *skipped_break_addr, displaced_after_inst;
105 static sigset_t orig_sigmask;
108 arch_do_displaced_inst(os_context_t *context,unsigned int orig_inst)
110 /* not sure how we ensure that we get the breakpoint reinstalled
111 * after doing this -dan */
112 unsigned long *pc = (unsigned long *)(*os_context_pc_addr(context));
114 orig_sigmask = *os_context_sigmask_addr(context);
115 sigaddset_blockable(os_context_sigmask_addr(context));
118 os_flush_icache((os_vm_address_t) pc, sizeof(unsigned long));
119 skipped_break_addr = pc;
123 sigtrap_handler(int signal, siginfo_t *siginfo, os_context_t *context)
127 #ifdef LISP_FEATURE_LINUX
128 os_restore_fp_control(context);
130 mask=(os_context_sigmask_addr(context));
132 code=*((u32 *)(*os_context_pc_addr(context)));
133 if (code == ((3 << 26) | (16 << 21) | (reg_ALLOC << 16))) {
134 /* twlti reg_ALLOC,0 - check for deferred interrupt */
135 *os_context_register_addr(context,reg_ALLOC)
136 -= PSEUDO_ATOMIC_INTERRUPTED_BIAS;
137 arch_skip_instruction(context);
138 /* interrupt or GC was requested in PA; now we're done with the
139 PA section we may as well get around to it */
140 interrupt_handle_pending(context);
144 if ((code >> 16) == ((3 << 10) | (6 << 5))) {
145 /* twllei reg_ZERO,N will always trap if reg_ZERO = 0 */
146 int trap = code & 0x1f;
150 fake_foreign_function_call(context);
151 lose("%%primitive halt called; the party is over.\n");
155 interrupt_internal_error(signal, code, context, trap == trap_Cerror);
158 case trap_PendingInterrupt:
159 /* when do we run this branch instead of the twlti code above? */
160 arch_skip_instruction(context);
161 interrupt_handle_pending(context);
164 case trap_Breakpoint:
165 handle_breakpoint(signal, code, context);
168 case trap_FunEndBreakpoint:
169 *os_context_pc_addr(context)
170 =(int)handle_fun_end_breakpoint(signal, code, context);
173 case trap_AfterBreakpoint:
174 *skipped_break_addr = trap_Breakpoint;
175 skipped_break_addr = NULL;
176 *(unsigned long *)*os_context_pc_addr(context)
177 = displaced_after_inst;
178 *os_context_sigmask_addr(context)= orig_sigmask;
180 os_flush_icache((os_vm_address_t) *os_context_pc_addr(context),
181 sizeof(unsigned long));
185 interrupt_handle_now(signal, code, context);
188 #ifdef LISP_FEATURE_DARWIN
193 if (((code >> 26) == 3) && (((code >> 21) & 31) == 24)) {
194 interrupt_internal_error(signal, code, context, 0);
195 #ifdef LISP_FEATURE_DARWIN
201 interrupt_handle_now(signal, code, context);
202 #ifdef LISP_FEATURE_DARWIN
203 /* Work around G5 bug */
209 void arch_install_interrupt_handlers()
211 undoably_install_low_level_interrupt_handler(SIGILL,sigtrap_handler);
212 undoably_install_low_level_interrupt_handler(SIGTRAP,sigtrap_handler);
216 extern lispobj call_into_lisp(lispobj fun, lispobj *args, int nargs);
218 lispobj funcall0(lispobj function)
220 lispobj *args = current_control_stack_pointer;
222 return call_into_lisp(function, args, 0);
225 lispobj funcall1(lispobj function, lispobj arg0)
227 lispobj *args = current_control_stack_pointer;
229 current_control_stack_pointer += 1;
232 return call_into_lisp(function, args, 1);
235 lispobj funcall2(lispobj function, lispobj arg0, lispobj arg1)
237 lispobj *args = current_control_stack_pointer;
239 current_control_stack_pointer += 2;
243 return call_into_lisp(function, args, 2);
246 lispobj funcall3(lispobj function, lispobj arg0, lispobj arg1, lispobj arg2)
248 lispobj *args = current_control_stack_pointer;
250 current_control_stack_pointer += 3;
255 return call_into_lisp(function, args, 3);
259 ppc_flush_icache(os_vm_address_t address, os_vm_size_t length)
261 os_vm_address_t end = (os_vm_address_t) ((int)(address+length+(32-1)) &~(32-1));
262 extern void ppc_flush_cache_line(os_vm_address_t);
264 while (address < end) {
265 ppc_flush_cache_line(address);
270 #ifdef LISP_FEATURE_LINKAGE_TABLE
272 /* Linkage tables for PowerPC
274 * Linkage entry size is 16, because we need at least 4 instructions to
279 * Define the registers to use in the linkage jump table. Can be the
280 * same. Some care must be exercised when choosing these. It has to be
281 * a register that is not otherwise being used. reg_NFP is a good
282 * choice. call_into_c trashes reg_NFP without preserving it, so we can
283 * trash it in the linkage jump table.
285 #define LINKAGE_TEMP_REG reg_NFP
286 #define LINKAGE_ADDR_REG reg_NFP
289 * Insert the necessary jump instructions at the given address.
292 arch_write_linkage_table_jmp(void* reloc_addr, void *target_addr)
295 * Make JMP to function entry.
297 * The instruction sequence is:
299 * addis 13, 0, (hi part of addr)
300 * ori 13, 13, (low part of addr)
306 unsigned long hi; /* Top 16 bits of address */
307 unsigned long lo; /* Low 16 bits of address */
310 inst_ptr = (int*) reloc_addr;
313 * Split the target address into hi and lo parts for the sethi
314 * instruction. hi is the top 22 bits. lo is the low 10 bits.
316 hi = (unsigned long) target_addr;
321 * addis 13, 0, (hi part)
324 inst = (15 << 26) | (LINKAGE_TEMP_REG << 21) | (0 << 16) | hi;
328 * ori 13, 13, (lo part)
331 inst = (24 << 26) | (LINKAGE_TEMP_REG << 21) | (LINKAGE_TEMP_REG << 16) | lo;
338 inst = (31 << 26) | (LINKAGE_TEMP_REG << 21) | (9 << 16) | (467 << 1);
345 inst = (19 << 26) | (20 << 21) | (528 << 1);
351 os_flush_icache((os_vm_address_t) reloc_addr, (char*) inst_ptr - (char*) reloc_addr);
355 arch_write_linkage_table_ref(void * reloc_addr, void *target_addr)
357 *(unsigned long *)reloc_addr = (unsigned long)target_addr;