2 * This is the IBM/Motorola/Apple/whoever Linux incarnation of
3 * arch-dependent OS-dependent routines. See also "linux-os.c". */
6 * This software is part of the SBCL system. See the README file for
9 * This software is derived from the CMU CL system, which was
10 * written at Carnegie Mellon University and released into the
11 * public domain. The software is in the public domain and is
12 * provided with absolutely no warranty. See the COPYING and CREDITS
13 * files for more information.
16 /* These header files were lifted wholesale from linux-os.c, some may
17 * be redundant. -- Dan Barlow ca. 2001-05-01 */
19 #include <sys/param.h>
26 #include "interrupt.h"
29 #include <sys/socket.h>
30 #include <sys/utsname.h>
32 #include <sys/types.h>
37 #include <sys/prctl.h>
40 #include "ppc-linux-mcontext.h"
42 size_t os_vm_page_size;
44 int arch_os_thread_init(struct thread *thread) {
45 #if defined(LISP_FEATURE_SB_THREAD)
46 pthread_setspecific(specials,thread);
49 /* For some reason, PPC Linux appears to default to not generating
50 * floating point exceptions. PR_SET_FPEXC is a PPC-specific
51 * option new in kernel 2.4.21 and 2.5.32 that allows us to
52 * configure this. Should we need to run on an older kenel, the
53 * equivalent trick is to get into a signal-handling context and
54 * modify the saved machine state register.
56 * PR_FP_EXC_PRECISE may be more accurate than we need,
57 * particularly if we move to the x86oid trick of inserting
58 * explicit synchronization for floating-point exception
59 * delivery. If we wish to move to such a model, the other two
60 * exception delivery modes that we could use are PR_FP_EXC_ASYNC
61 * and PR_FP_EXC_NONRECOV, and exception delivery can be forced
62 * by any access to the FPSCR. -- AB, 2010-May-23 */
63 prctl(PR_SET_FPEXC, PR_FP_EXC_PRECISE, 0, 0);
65 return 1; /* success */
67 int arch_os_thread_cleanup(struct thread *thread) {
68 return 1; /* success */
71 os_context_register_t *
72 os_context_register_addr(os_context_t *context, int offset)
74 #if defined(GLIBC231_STYLE_UCONTEXT)
75 return &((context->uc_mcontext.regs)->gpr[offset]);
76 #elif defined(GLIBC232_STYLE_UCONTEXT)
77 return &((context->uc_mcontext.uc_regs->gregs)[offset]);
81 os_context_register_t *
82 os_context_pc_addr(os_context_t *context)
84 #if defined(GLIBC231_STYLE_UCONTEXT)
85 return &((context->uc_mcontext.regs)->nip);
86 #elif defined(GLIBC232_STYLE_UCONTEXT)
87 return &((context->uc_mcontext.uc_regs->gregs)[PT_NIP]);
91 os_context_register_t *
92 os_context_lr_addr(os_context_t *context)
94 #if defined(GLIBC231_STYLE_UCONTEXT)
95 return &((context->uc_mcontext.regs)->link);
96 #elif defined(GLIBC232_STYLE_UCONTEXT)
97 return &((context->uc_mcontext.uc_regs->gregs)[PT_LNK]);
101 os_context_register_t *
102 os_context_ctr_addr(os_context_t *context)
104 /* Like os_context_fp_control() and os_context_lr_addr(), this
105 * uses an index beyond the declared end of the array in order to
106 * find the correct register value in the context. */
107 #if defined(GLIBC231_STYLE_UCONTEXT)
108 /* FIXME: This probably should be ->ctr instead of ->gpr[PT_CTR]. */
109 return &((context->uc_mcontext.regs)->gpr[PT_CTR]);
110 #elif defined(GLIBC232_STYLE_UCONTEXT)
111 return &((context->uc_mcontext.uc_regs)->gregs[PT_CTR]);
115 os_context_register_t *
116 os_context_cr_addr(os_context_t *context)
118 /* Like os_context_fp_control() and os_context_lr_addr(), this
119 * uses an index beyond the declared end of the array in order to
120 * find the correct register value in the context. */
121 #if defined(GLIBC231_STYLE_UCONTEXT)
122 /* FIXME: This probably should be ->ccr instead of ->gpr[PT_CCR]. */
123 return &((context->uc_mcontext.regs)->gpr[PT_CCR]);
124 #elif defined(GLIBC232_STYLE_UCONTEXT)
125 return &((context->uc_mcontext.uc_regs)->gregs[PT_CCR]);
130 os_context_sigmask_addr(os_context_t *context)
132 #if defined(GLIBC231_STYLE_UCONTEXT)
133 return &context->uc_sigmask;
134 #elif defined(GLIBC232_STYLE_UCONTEXT)
135 return &context->uc_sigmask;
140 os_context_fp_control(os_context_t *context)
142 /* So this may look like nice, well behaved code. However, closer
143 inspection reveals that gpr is simply the general purpose
144 registers, and PT_FPSCR is an offset that is larger than 32
145 (the number of ppc registers), but that happens to get the
146 right answer. -- CSR, 2002-07-11 */
147 #if defined(GLIBC231_STYLE_UCONTEXT)
148 return context->uc_mcontext.regs->gpr[PT_FPSCR];
149 #elif defined(GLIBC232_STYLE_UCONTEXT)
150 return context->uc_mcontext.uc_regs->gregs[PT_FPSCR];
155 os_restore_fp_control(os_context_t *context)
157 /* KLUDGE: mtfsf has to be run against a float register, so we
158 * construct the float we need to use as an integer, then cast
159 * a pointer to its storage to a double and load that. For
160 * this to work, control must be the same width as a double,
161 * 64 bits. And why aren't we using a union here, anyway? */
162 unsigned long long control;
165 /* FIXME: We are only preserving enabled traps and rounding
166 * mode here. Do we also want to preserve "fast mode"? */
167 control = os_context_fp_control(context) &
168 (FLOAT_TRAPS_BYTE_MASK | FLOAT_ROUNDING_MODE_MASK);
170 d = *((double *) &control);
171 asm volatile ("mtfsf 0xff,%0" : : "f" (d));
175 os_flush_icache(os_vm_address_t address, os_vm_size_t length)
178 ppc_flush_icache(address,length);