2 * This software is part of the SBCL system. See the README file for
5 * This software is derived from the CMU CL system, which was
6 * written at Carnegie Mellon University and released into the
7 * public domain. The software is in the public domain and is
8 * provided with absolutely no warranty. See the COPYING and CREDITS
9 * files for more information.
22 #include "interrupt.h"
24 #include "breakpoint.h"
27 #ifdef LISP_FEATURE_LINUX
28 extern int linux_sparc_siginfo_bug;
36 os_vm_address_t arch_get_bad_addr(int sig, siginfo_t *code, os_context_t *context)
38 unsigned long badinst;
42 pc = (unsigned long *)(*os_context_pc_addr(context));
44 /* On the sparc, we have to decode the instruction. */
46 /* Make sure it's not the pc thats bogus, and that it was lisp code */
47 /* that caused the fault. */
48 if ((unsigned long) pc & 3) {
52 if ((pc < READ_ONLY_SPACE_START ||
53 pc >= READ_ONLY_SPACE_START+READ_ONLY_SPACE_SIZE) &&
54 (pc < current_dynamic_space ||
55 pc >= current_dynamic_space + DYNAMIC_SPACE_SIZE)) {
61 if ((badinst >> 30) != 3)
62 /* All load/store instructions have op = 11 (binary) */
65 rs1 = (badinst>>14)&0x1f;
67 if (badinst & (1<<13)) {
68 /* r[rs1] + simm(13) */
69 int simm13 = badinst & 0x1fff;
74 return (os_vm_address_t)
75 (*os_context_register_addr(context, rs1)+simm13);
79 int rs2 = badinst & 0x1f;
81 return (os_vm_address_t)
82 (*os_context_register_addr(context, rs1) +
83 *os_context_register_addr(context, rs2));
87 void arch_skip_instruction(os_context_t *context)
89 ((char *) *os_context_pc_addr(context)) = ((char *) *os_context_npc_addr(context));
90 ((char *) *os_context_npc_addr(context)) += 4;
93 unsigned char *arch_internal_error_arguments(os_context_t *context)
95 return (unsigned char *)(*os_context_pc_addr(context) + 4);
98 boolean arch_pseudo_atomic_atomic(os_context_t *context)
100 return ((*os_context_register_addr(context,reg_ALLOC)) & 4);
103 void arch_set_pseudo_atomic_interrupted(os_context_t *context)
105 *os_context_register_addr(context,reg_ALLOC) |= 1;
108 unsigned long arch_install_breakpoint(void *pc)
110 unsigned long *ptr = (unsigned long *)pc;
111 unsigned long result = *ptr;
112 *ptr = trap_Breakpoint;
114 os_flush_icache((os_vm_address_t) pc, sizeof(unsigned long));
119 void arch_remove_breakpoint(void *pc, unsigned long orig_inst)
121 *(unsigned long *)pc = orig_inst;
122 os_flush_icache((os_vm_address_t) pc, sizeof(unsigned long));
125 static unsigned long *skipped_break_addr, displaced_after_inst;
126 static sigset_t orig_sigmask;
128 void arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst)
130 unsigned long *pc = (unsigned long *)(*os_context_pc_addr(context));
131 unsigned long *npc = (unsigned long *)(*os_context_npc_addr(context));
133 /* orig_sigmask = context->sigmask;
134 sigemptyset(&context->sigmask); */
136 /* FILLBLOCKSET(&context->uc_sigmask);*/
139 os_flush_icache((os_vm_address_t) pc, sizeof(unsigned long));
140 skipped_break_addr = pc;
141 displaced_after_inst = *npc;
142 *npc = trap_AfterBreakpoint;
143 os_flush_icache((os_vm_address_t) npc, sizeof(unsigned long));
147 static int pseudo_atomic_trap_p(os_context_t *context)
150 unsigned int badinst;
154 pc = (unsigned int*) *os_context_pc_addr(context);
158 /* Check to see if the current instruction is a pseudo-atomic-trap */
159 if (((badinst >> 30) == 2) && (((badinst >> 19) & 0x3f) == 0x3a)
160 && (((badinst >> 13) & 1) == 1) && ((badinst & 0x7f) == PSEUDO_ATOMIC_TRAP))
162 unsigned int previnst;
165 * Check to see if the previous instruction was an andcc alloc-tn,
166 * 3, zero-tn instruction.
168 if (((previnst >> 30) == 2) && (((previnst >> 19) & 0x3f) == 0x11)
169 && (((previnst >> 14) & 0x1f) == reg_ALLOC)
170 && (((previnst >> 25) & 0x1f) == reg_ZERO)
171 && (((previnst >> 13) & 1) == 1)
172 && ((previnst & 0x1fff) == 3))
178 fprintf(stderr, "Oops! Got a PSEUDO-ATOMIC-TRAP without a preceeding andcc!\n");
184 static void sigill_handler(int signal, siginfo_t *siginfo, void *void_context)
186 os_context_t *context = arch_os_get_context(&void_context);
187 #ifdef LISP_FEATURE_LINUX
188 /* FIXME: Check that this is necessary -- CSR, 2002-07-15 */
189 os_restore_fp_control(context);
192 if ((siginfo->si_code) == ILL_ILLOPC
193 #ifdef LISP_FEATURE_LINUX
194 || (linux_sparc_siginfo_bug && (siginfo->si_code == 2))
199 unsigned int* pc = (unsigned int*) siginfo->si_addr;
202 trap = inst & 0x3fffff;
205 case trap_PendingInterrupt:
206 arch_skip_instruction(context);
207 interrupt_handle_pending(context);
211 fake_foreign_function_call(context);
212 lose("%%primitive halt called; the party is over.\n");
216 interrupt_internal_error(signal, siginfo, context, trap == trap_Cerror);
219 case trap_Breakpoint:
220 handle_breakpoint(signal, siginfo, context);
223 case trap_FunEndBreakpoint:
224 *os_context_pc_addr(context) = (int) handle_fun_end_breakpoint(signal, siginfo, context);
225 *os_context_npc_addr(context) = *os_context_pc_addr(context) + 4;
228 case trap_AfterBreakpoint:
229 *skipped_break_addr = trap_Breakpoint;
230 skipped_break_addr = NULL;
231 *(unsigned long *) os_context_pc_addr(context) = displaced_after_inst;
232 /* context->sigmask = orig_sigmask; */
233 os_flush_icache((os_vm_address_t) os_context_pc_addr(context), sizeof(unsigned long));
237 interrupt_handle_now(signal, siginfo, context);
241 else if ((siginfo->si_code) == ILL_ILLTRP
242 #ifdef LISP_FEATURE_LINUX
243 || (linux_sparc_siginfo_bug && (siginfo->si_code) == 192)
246 if (pseudo_atomic_trap_p(context)) {
247 /* A trap instruction from a pseudo-atomic. We just need
248 to fixup up alloc-tn to remove the interrupted flag,
249 skip over the trap instruction, and then handle the
250 pending interrupt(s). */
251 *os_context_register_addr(context, reg_ALLOC) &= ~7;
252 arch_skip_instruction(context);
253 interrupt_handle_pending(context);
256 interrupt_internal_error(signal, siginfo, context, 0);
260 interrupt_handle_now(signal, siginfo, context);
264 static void sigemt_handler(int signal, siginfo_t *siginfo, void *void_context)
266 unsigned long badinst;
267 boolean subtract, immed;
268 int rd, rs1, op1, rs2, op2, result;
269 os_context_t *context = arch_os_get_context(&void_context);
270 #ifdef LISP_FEATURE_LINUX
271 os_restore_fp_control(context);
274 badinst = *(unsigned long *)os_context_pc_addr(context);
275 if ((badinst >> 30) != 2 || ((badinst >> 20) & 0x1f) != 0x11) {
276 /* It wasn't a tagged add. Pass the signal into lisp. */
277 interrupt_handle_now(signal, siginfo, context);
281 fprintf(stderr, "SIGEMT trap handler with tagged op instruction!\n");
283 /* Extract the parts of the inst. */
284 subtract = badinst & (1<<19);
285 rs1 = (badinst>>14) & 0x1f;
286 op1 = *os_context_register_addr(context, rs1);
288 /* If the first arg is $ALLOC then it is really a signal-pending note */
289 /* for the pseudo-atomic noise. */
290 if (rs1 == reg_ALLOC) {
291 /* Perform the op anyway. */
292 op2 = badinst & 0x1fff;
299 *os_context_register_addr(context, reg_ALLOC) = result & ~7;
300 arch_skip_instruction(context);
301 interrupt_handle_pending(context);
305 if ((op1 & 3) != 0) {
306 /* The first arg wan't a fixnum. */
307 interrupt_internal_error(signal, siginfo, context, 0);
311 if (immed = badinst & (1<<13)) {
312 op2 = badinst & 0x1fff;
317 rs2 = badinst & 0x1f;
318 op2 = *os_context_register_addr(context, rs2);
321 if ((op2 & 3) != 0) {
322 /* The second arg wan't a fixnum. */
323 interrupt_internal_error(signal, siginfo, context, 0);
327 rd = (badinst>>25) & 0x1f;
329 /* Don't bother computing the result unless we are going to use it. */
331 result = (op1>>2) - (op2>>2);
333 result = (op1>>2) + (op2>>2);
335 dynamic_space_free_pointer =
336 (lispobj *) *os_context_register_addr(context, reg_ALLOC);
338 *os_context_register_addr(context, rd) = alloc_number(result);
340 *os_context_register_addr(context, reg_ALLOC) =
341 (unsigned long) dynamic_space_free_pointer;
344 arch_skip_instruction(context);
347 void arch_install_interrupt_handlers()
349 undoably_install_low_level_interrupt_handler(SIGILL , sigill_handler);
350 undoably_install_low_level_interrupt_handler(SIGEMT, sigemt_handler);
354 extern lispobj call_into_lisp(lispobj fun, lispobj *args, int nargs);
356 lispobj funcall0(lispobj function)
358 lispobj *args = current_control_stack_pointer;
360 return call_into_lisp(function, args, 0);
363 lispobj funcall1(lispobj function, lispobj arg0)
365 lispobj *args = current_control_stack_pointer;
367 current_control_stack_pointer += 1;
370 return call_into_lisp(function, args, 1);
373 lispobj funcall2(lispobj function, lispobj arg0, lispobj arg1)
375 lispobj *args = current_control_stack_pointer;
377 current_control_stack_pointer += 2;
381 return call_into_lisp(function, args, 2);
384 lispobj funcall3(lispobj function, lispobj arg0, lispobj arg1, lispobj arg2)
386 lispobj *args = current_control_stack_pointer;
388 current_control_stack_pointer += 3;
393 return call_into_lisp(function, args, 3);
396 #ifdef LISP_FEATURE_LINKAGE_TABLE
398 /* This a naive port from CMUCL/sparc, which was mostly stolen from the
399 * CMUCL/x86 version, with adjustments for sparc
401 * Linkage entry size is 16, because we need at least 3 instruction to
404 * sethi %hi(addr), %g4
405 * jmpl [%g4 + %lo(addr)], %g5
408 * The Sparc V9 ABI seems to use 8 words for its jump tables. Maybe
409 * we should do the same?
413 * Define the registers to use in the linkage jump table. Can be the
414 * same. Some care must be exercised when choosing these. It has to be
415 * a register that is not otherwise being used. reg_L0 is a good
416 * choice. call_into_c trashes reg_L0 without preserving it, so we can
417 * trash it in the linkage jump table.
419 #define LINKAGE_TEMP_REG reg_L0
420 #define LINKAGE_ADDR_REG reg_L0
423 * Insert the necessary jump instructions at the given address.
426 arch_write_linkage_table_jmp(void* reloc_addr, void *target_addr)
429 * Make JMP to function entry.
431 * The instruction sequence is:
433 * sethi %hi(addr), temp_reg
434 * jmp %temp_reg + %lo(addr), %addr_reg
440 unsigned long hi; /* Top 22 bits of address */
441 unsigned long lo; /* Low 10 bits of address */
444 inst_ptr = (int*) reloc_addr;
447 * Split the target address into hi and lo parts for the sethi
448 * instruction. hi is the top 22 bits. lo is the low 10 bits.
450 hi = (unsigned long) target_addr;
455 * sethi %hi(addr), temp_reg
458 inst = (0 << 30) | (LINKAGE_TEMP_REG << 25) | (4 << 22) | hi;
462 * jmpl [temp_reg + %lo(addr)], addr_reg
465 inst = (2U << 30) | (LINKAGE_ADDR_REG << 25) | (0x38 << 19)
466 | (LINKAGE_TEMP_REG << 14) | (1 << 13) | lo;
469 /* nop (really sethi 0, %g0) */
471 inst = (0 << 30) | (0 << 25) | (4 << 22) | 0;
476 os_flush_icache((os_vm_address_t) reloc_addr, (char*) inst_ptr - (char*) reloc_addr);
480 arch_write_linkage_table_ref(void * reloc_addr, void *target_addr)
482 *(unsigned long *)reloc_addr = (unsigned long)target_addr;