2 * This software is part of the SBCL system. See the README file for
5 * This software is derived from the CMU CL system, which was
6 * written at Carnegie Mellon University and released into the
7 * public domain. The software is in the public domain and is
8 * provided with absolutely no warranty. See the COPYING and CREDITS
9 * files for more information.
24 #include "interrupt.h"
26 #include "breakpoint.h"
28 #include "pseudo-atomic.h"
30 #include "genesis/static-symbols.h"
31 #include "genesis/symbol.h"
33 #define BREAKPOINT_INST 0xcc /* INT3 */
35 unsigned long fast_random_state = 1;
41 arch_get_bad_addr(int sig, siginfo_t *code, os_context_t *context)
43 return (os_vm_address_t)code->si_addr;
48 * hacking signal contexts
50 * (This depends both on architecture, which determines what we might
51 * want to get to, and on OS, which determines how we get to it.)
54 os_context_register_t *
55 context_eflags_addr(os_context_t *context)
57 #if defined __linux__ || defined __sun
58 /* KLUDGE: As of kernel 2.2.14 on Red Hat 6.2, there's code in the
59 * <sys/ucontext.h> file to define symbolic names for offsets into
60 * gregs[], but it's conditional on __USE_GNU and not defined, so
61 * we need to do this nasty absolute index magic number thing
63 return &context->uc_mcontext.gregs[17];
64 #elif defined __FreeBSD__
65 return &context->uc_mcontext.mc_rflags;
66 #elif defined LISP_FEATURE_DARWIN
67 return CONTEXT_ADDR_FROM_STEM(rflags);
68 #elif defined __OpenBSD__
69 return &context->sc_rflags;
70 #elif defined __NetBSD__
71 return CONTEXT_ADDR_FROM_STEM(RFLAGS);
77 void arch_skip_instruction(os_context_t *context)
79 /* Assuming we get here via an INT3 xxx instruction, the PC now
80 * points to the interrupt code (a Lisp value) so we just move
81 * past it. Skip the code; after that, if the code is an
82 * error-trap or cerror-trap then skip the data bytes that follow. */
88 /* Get and skip the Lisp interrupt code. */
89 code = *(char*)(*os_context_pc_addr(context))++;
94 /* Lisp error arg vector length */
95 vlen = *(char*)(*os_context_pc_addr(context))++;
96 /* Skip Lisp error arg data bytes. */
98 ++*os_context_pc_addr(context);
102 case trap_Breakpoint: /* not tested */
103 case trap_FunEndBreakpoint: /* not tested */
106 case trap_PendingInterrupt:
108 case trap_SingleStepAround:
109 case trap_SingleStepBefore:
110 /* only needed to skip the Code */
114 fprintf(stderr,"[arch_skip_inst invalid code %ld\n]\n",code);
119 "/[arch_skip_inst resuming at %x]\n",
120 *os_context_pc_addr(context)));
124 arch_internal_error_arguments(os_context_t *context)
126 return 1 + (unsigned char *)(*os_context_pc_addr(context));
130 arch_pseudo_atomic_atomic(os_context_t *context)
132 return get_pseudo_atomic_atomic(arch_os_get_current_thread());
136 arch_set_pseudo_atomic_interrupted(os_context_t *context)
138 struct thread *thread = arch_os_get_current_thread();
139 set_pseudo_atomic_interrupted(thread);
143 arch_clear_pseudo_atomic_interrupted(os_context_t *context)
145 struct thread *thread = arch_os_get_current_thread();
146 clear_pseudo_atomic_interrupted(thread);
150 * This stuff seems to get called for TRACE and debug activity.
154 arch_install_breakpoint(void *pc)
156 unsigned int result = *(unsigned int*)pc;
158 *(char*)pc = BREAKPOINT_INST; /* x86 INT3 */
159 *((char*)pc+1) = trap_Breakpoint; /* Lisp trap code */
165 arch_remove_breakpoint(void *pc, unsigned int orig_inst)
167 *((char *)pc) = orig_inst & 0xff;
168 *((char *)pc + 1) = (orig_inst & 0xff00) >> 8;
171 /* When single stepping, single_stepping holds the original instruction
173 unsigned int *single_stepping = NULL;
174 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
175 unsigned int single_step_save1;
176 unsigned int single_step_save2;
177 unsigned int single_step_save3;
181 arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst)
183 unsigned int *pc = (unsigned int*)(*os_context_pc_addr(context));
185 /* Put the original instruction back. */
186 *((char *)pc) = orig_inst & 0xff;
187 *((char *)pc + 1) = (orig_inst & 0xff00) >> 8;
189 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
190 /* Install helper instructions for the single step:
191 * pushf; or [esp],0x100; popf. */
192 single_step_save1 = *(pc-3);
193 single_step_save2 = *(pc-2);
194 single_step_save3 = *(pc-1);
195 *(pc-3) = 0x9c909090;
196 *(pc-2) = 0x00240c81;
197 *(pc-1) = 0x9d000001;
199 *context_eflags_addr(context) |= 0x100;
202 single_stepping = pc;
204 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
205 *os_context_pc_addr(context) = (os_context_register_t)((char *)pc - 9);
210 arch_handle_breakpoint(os_context_t *context)
212 --*os_context_pc_addr(context);
213 handle_breakpoint(context);
217 arch_handle_fun_end_breakpoint(os_context_t *context)
219 --*os_context_pc_addr(context);
220 *os_context_pc_addr(context) =
221 (unsigned long)handle_fun_end_breakpoint(context);
225 arch_handle_single_step_trap(os_context_t *context, int trap)
227 arch_skip_instruction(context);
228 /* On x86-64 the fdefn / function is always in RAX, so we pass
229 * 0 as the register_offset. */
230 handle_single_step_trap(context, trap, 0);
235 sigtrap_handler(int signal, siginfo_t *info, os_context_t *context)
239 if (single_stepping && (signal==SIGTRAP))
241 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
242 /* Un-install single step helper instructions. */
243 *(single_stepping-3) = single_step_save1;
244 *(single_stepping-2) = single_step_save2;
245 *(single_stepping-1) = single_step_save3;
247 *context_eflags_addr(context) ^= 0x100;
249 /* Re-install the breakpoint if possible. */
250 if ((char *)*os_context_pc_addr(context) ==
251 (char *)single_stepping + 1) {
252 fprintf(stderr, "warning: couldn't reinstall breakpoint\n");
254 *((char *)single_stepping) = BREAKPOINT_INST; /* x86 INT3 */
255 *((char *)single_stepping+1) = trap_Breakpoint;
258 single_stepping = NULL;
262 /* This is just for info in case the monitor wants to print an
264 current_control_stack_pointer =
265 (lispobj *)*os_context_sp_addr(context);
267 /* On entry %eip points just after the INT3 byte and aims at the
268 * 'kind' value (eg trap_Cerror). For error-trap and Cerror-trap a
269 * number of bytes will follow, the first is the length of the byte
270 * arguments to follow. */
271 trap = *(unsigned char *)(*os_context_pc_addr(context));
273 handle_trap(context, trap);
277 sigill_handler(int signal, siginfo_t *siginfo, os_context_t *context) {
278 /* Triggering SIGTRAP using int3 is unreliable on OS X/x86, so
279 * we need to use illegal instructions for traps.
281 #if defined(LISP_FEATURE_DARWIN) && !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
282 if (*((unsigned short *)*os_context_pc_addr(context)) == 0x0b0f) {
283 *os_context_pc_addr(context) += 2;
284 return sigtrap_handler(signal, siginfo, context);
288 fake_foreign_function_call(context);
289 lose("Unhandled SIGILL.");
292 #ifdef X86_64_SIGFPE_FIXUP
293 #define MXCSR_IE (0x01) /* Invalid Operation */
294 #define MXCSR_DE (0x02) /* Denormal */
295 #define MXCSR_ZE (0x04) /* Devide-by-Zero */
296 #define MXCSR_OE (0x08) /* Overflow */
297 #define MXCSR_UE (0x10) /* Underflow */
298 #define MXCSR_PE (0x20) /* Precision */
301 mxcsr_to_code(unsigned int mxcsr)
303 /* Extract unmasked exception bits. */
304 mxcsr &= ~(mxcsr >> 7) & 0x3F;
306 /* This order is defined at "Intel 64 and IA-32 Architectures
307 * Software Developerfs Manual" Volume 1: "Basic Architecture",
308 * 4.9.2 "Floating-Point Exception Priority". */
309 if (mxcsr & MXCSR_IE)
311 else if (mxcsr & MXCSR_ZE)
313 else if (mxcsr & MXCSR_DE)
315 else if (mxcsr & MXCSR_OE)
317 else if (mxcsr & MXCSR_UE)
319 else if (mxcsr & MXCSR_PE)
326 sigfpe_handler(int signal, siginfo_t *siginfo, os_context_t *context)
328 unsigned int *mxcsr = arch_os_context_mxcsr_addr(context);
330 if (siginfo->si_code == 0) { /* XMM exception */
331 siginfo->si_code = mxcsr_to_code(*mxcsr);
333 /* Clear sticky exception flag. */
337 interrupt_handle_now(signal, siginfo, context);
342 arch_install_interrupt_handlers()
344 SHOW("entering arch_install_interrupt_handlers()");
346 /* Note: The old CMU CL code here used sigtrap_handler() to handle
347 * SIGILL as well as SIGTRAP. I couldn't see any reason to do
348 * things that way. So, I changed to separate handlers when
349 * debugging a problem on OpenBSD, where SBCL wasn't catching
350 * SIGILL properly, but was instead letting the process be
351 * terminated with an "Illegal instruction" output. If this change
352 * turns out to break something (maybe breakpoint handling on some
353 * OS I haven't tested on?) and we have to go back to the old CMU
354 * CL way, I hope there will at least be a comment to explain
355 * why.. -- WHN 2001-06-07 */
356 #if !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
357 undoably_install_low_level_interrupt_handler(SIGILL , sigill_handler);
358 undoably_install_low_level_interrupt_handler(SIGTRAP, sigtrap_handler);
361 #ifdef X86_64_SIGFPE_FIXUP
362 undoably_install_low_level_interrupt_handler(SIGFPE, sigfpe_handler);
365 SHOW("returning from arch_install_interrupt_handlers()");
368 #ifdef LISP_FEATURE_LINKAGE_TABLE
369 /* FIXME: It might be cleaner to generate these from the lisp side of
374 arch_write_linkage_table_jmp(char * reloc, void * fun)
376 unsigned long addr = (unsigned long) fun;
379 *reloc++ = 0xFF; /* Opcode for near jump to absolute reg/mem64. */
380 *reloc++ = 0x25; /* ModRM #b00 100 101, i.e. RIP-relative. */
381 *reloc++ = 0x00; /* 32-bit displacement field = 0 */
382 *reloc++ = 0x00; /* ... */
383 *reloc++ = 0x00; /* ... */
384 *reloc++ = 0x00; /* ... */
386 for (i = 0; i < 8; i++) {
387 *reloc++ = addr & 0xff;
391 /* write a nop for good measure. */
396 arch_write_linkage_table_ref(void * reloc, void * data)
398 *(unsigned long *)reloc = (unsigned long)data;
403 /* These setup and check *both* the sse2 and x87 FPUs. While lisp code
404 only uses the sse2 FPU, other code (such as libc) may use the x87 FPU.
412 /* return the x87 exception flags ored in with the sse2
413 * control+status flags */
414 asm ("fnstsw %0" : "=m" (temp));
417 asm ("stmxcsr %0" : "=m" (temp));
419 /* flip exception mask bits */
420 return result ^ (0x3F << 7);
426 unsigned short unused1;
428 unsigned short unused2;
429 unsigned int other_regs[5];
433 arch_set_fp_modes(unsigned int mxcsr)
438 /* turn trap enable bits into exception mask */
442 asm ("fnstenv %0" : "=m" (f_env));
443 /* set control word: always long double precision
444 * get traps and rounding from mxcsr word */
445 f_env.cw = 0x300 | ((mxcsr >> 7) & 0x3F) | (((mxcsr >> 13) & 0x3) << 10);
446 /* set status word: only override exception flags, from mxcsr */
448 f_env.sw |= (mxcsr & 0x3F);
450 asm ("fldenv %0" : : "m" (f_env));
452 /* now, simply, load up the mxcsr register */
454 asm ("ldmxcsr %0" : : "m" (temp));