+
+ /* Figure out where we will end up after running the displaced
+ * instruction by defaulting to the next instruction in the stream
+ * and then checking for branch instructions. FIXME: This will
+ * probably screw up if it attempts to step a trap instruction. */
+ next_pc = pc + 1;
+
+ if (op == 18) {
+ /* Branch I-form */
+ unsigned int displacement = orig_inst & 0x03fffffc;
+ /* Sign extend */
+ if (displacement & 0x02000000) {
+ displacement |= 0xc0000000;
+ }
+ if (orig_inst & 2) { /* Absolute Address */
+ next_pc = (unsigned int *)displacement;
+ } else {
+ next_pc = (unsigned int *)(((unsigned int)pc) + displacement);
+ }
+ } else if ((op == 16)
+ && should_branch(context, orig_inst)) {
+ /* Branch Conditional B-form */
+ unsigned int displacement = orig_inst & 0x0000fffc;
+ /* Sign extend */
+ if (displacement & 0x00008000) {
+ displacement |= 0xffff0000;
+ }
+ if (orig_inst & 2) { /* Absolute Address */
+ next_pc = (unsigned int *)displacement;
+ } else {
+ next_pc = (unsigned int *)(((unsigned int)pc) + displacement);
+ }
+ } else if ((op == 19) && (sub_op == 16)
+ && should_branch(context, orig_inst)) {
+ /* Branch Conditional to Link Register XL-form */
+ next_pc = (unsigned int *)
+ ((*os_context_lr_addr(context)) & ~3);
+ } else if ((op == 19) && (sub_op == 528)
+ && should_branch(context, orig_inst)) {
+ /* Branch Conditional to Count Register XL-form */
+ next_pc = (unsigned int *)
+ ((*os_context_ctr_addr(context)) & ~3);
+ }
+
+ /* Set the "after" breakpoint. */
+ displaced_after_inst = *next_pc;
+ *next_pc = TRAP_INSTRUCTION(trap_AfterBreakpoint);
+ os_flush_icache((os_vm_address_t)next_pc, sizeof(unsigned int));