1.0.47.27: limit open coding from MEMBER, ASSOC, &co

[sbcl.git] / src / compiler / x86-64 / system.lisp

diff --git a/src/compiler/x86-64/system.lisp b/src/compiler/x86-64/system.lisp
index 88f9997..1edf735 100644 (file)
--- a/src/compiler/x86-64/system.lisp
+++ b/src/compiler/x86-64/system.lisp
@@ -44,7 +44,7 @@
     (inst jmp :ne DONE)
 
     ;; Pick off fixnums.
-    (inst and al-tn 7)
+    (inst and al-tn fixnum-tag-mask)
     (inst jmp :e DONE)
 
     ;; must be an other immediate
@@ -336,14 +336,12 @@
   (:result-types unsigned-num unsigned-num)
   (:generator 5
      (zeroize eax)
+     ;; Intel docs seem quite consistent on only using CPUID before RDTSC,
+     ;; not both before and after. Go figure.
      (inst cpuid)
      (inst rdtsc)
-     (inst push edx)
-     (inst push eax)
-     (zeroize eax)
-     (inst cpuid)
-     (inst pop lo)
-     (inst pop hi)))
+     (move lo eax)
+     (move hi edx)))
 
 (defmacro with-cycle-counter (&body body)
   "Returns the primary value of BODY as the primary value, and the
@@ -363,3 +361,36 @@ number of CPU cycles elapsed as secondary value. EXPERIMENTAL."
     (inst inc (make-ea :qword :base count-vector
                        :disp (- (* (+ vector-data-offset index) n-word-bytes)
                                 other-pointer-lowtag)))))
+\f
+;;;; Memory barrier support
+
+#!+memory-barrier-vops
+(define-vop (%compiler-barrier)
+  (:policy :fast-safe)
+  (:translate %compiler-barrier)
+  (:generator 3))
+
+#!+memory-barrier-vops
+(define-vop (%memory-barrier)
+  (:policy :fast-safe)
+  (:translate %memory-barrier)
+  (:generator 3
+    (inst mfence)))
+
+#!+memory-barrier-vops
+(define-vop (%read-barrier)
+  (:policy :fast-safe)
+  (:translate %read-barrier)
+  (:generator 3))
+
+#!+memory-barrier-vops
+(define-vop (%write-barrier)
+  (:policy :fast-safe)
+  (:translate %write-barrier)
+  (:generator 3))
+
+#!+memory-barrier-vops
+(define-vop (%data-dependency-barrier)
+  (:policy :fast-safe)
+  (:translate %data-dependency-barrier)
+  (:generator 3))