Simplify (and robustify) regular PACKing

[sbcl.git] / src / runtime / x86-64-arch.h

diff --git a/src/runtime/x86-64-arch.h b/src/runtime/x86-64-arch.h
index 83e08fb..b25b9d8 100644 (file)
--- a/src/runtime/x86-64-arch.h
+++ b/src/runtime/x86-64-arch.h
@@ -9,28 +9,42 @@
 #error genesis/config.h (or sbcl.h) must be included before this file
 #endif
 
+#include "interr.h"                     /* for declaration of lose() */
+
 #define ARCH_HAS_STACK_POINTER
+#define ALIEN_STACK_GROWS_DOWNWARD
 
 /* FIXME: Do we also want
  *   #define ARCH_HAS_FLOAT_REGISTERS
  * here? (The answer wasn't obvious to me when merging the
  * architecture-abstracting patches for CSR's SPARC port. -- WHN 2002-02-15) */
 
-extern never_returns lose(char *fmt, ...);
+#define COMPILER_BARRIER \
+    do { __asm__ __volatile__ ( "" : : : "memory"); } while (0)
 
-static inline void 
-get_spinlock(volatile lispobj *word,long value)
+static inline void
+get_spinlock(volatile lispobj *word, unsigned long value)
 {
 #ifdef LISP_FEATURE_SB_THREAD
     u64 rax=0;
-    if(*word==value) 
-       lose("recursive get_spinlock: 0x%x,%ld\n",word,value);
+    if(*word==value)
+        lose("recursive get_spinlock: 0x%x,%ld\n",word,value);
     do {
-       asm ("xor %0,%0\n\
-              lock cmpxchg %1,%2" 
-            : "=a" (rax)
-            : "r" (value), "m" (*word)
-            : "memory", "cc");
+#if defined(LISP_FEATURE_DARWIN)
+        asm volatile
+            ("xor %0,%0\n\
+              lock/cmpxchg %1,%2"
+             : "=a" (rax)
+             : "r" (value), "m" (*word)
+             : "memory", "cc");
+#else
+        asm volatile
+            ("xor %0,%0\n\
+              lock cmpxchg %1,%2"
+             : "=a" (rax)
+             : "r" (value), "m" (*word)
+             : "memory", "cc");
+#endif
     } while(rax!=0);
 #else
     *word=value;
@@ -40,7 +54,24 @@ get_spinlock(volatile lispobj *word,long value)
 static inline void
 release_spinlock(volatile lispobj *word)
 {
+    /* See comment in RELEASE-SPINLOCK in target-thread.lisp. */
+    COMPILER_BARRIER;
     *word=0;
+    COMPILER_BARRIER;
 }
 
+static inline lispobj
+swap_lispobjs(volatile lispobj *dest, lispobj value)
+{
+    lispobj old_value;
+    asm volatile
+        ("lock xchg %0,(%1)"
+         : "=r" (old_value)
+         : "r" (dest), "0" (value)
+         : "memory");
+    return old_value;
+}
+
+extern void AMD64_SYSV_ABI fast_bzero(void *, size_t);
+
 #endif /* _X86_64_ARCH_H */