Further work towards use of win32 file HANDLEs

[sbcl.git] / src / runtime / x86-64-linux-os.c

diff --git a/src/runtime/x86-64-linux-os.c b/src/runtime/x86-64-linux-os.c
index 0579730..d3d2c30 100644 (file)
--- a/src/runtime/x86-64-linux-os.c
+++ b/src/runtime/x86-64-linux-os.c
@@ -48,7 +48,7 @@
 #include <linux/unistd.h>
 #include <sys/mman.h>
 #include <linux/version.h>
-#include "thread.h"            /* dynamic_values_bytes */
+#include "thread.h"             /* dynamic_values_bytes */
 
 #include "validate.h"
 size_t os_vm_page_size;
@@ -56,8 +56,12 @@ size_t os_vm_page_size;
 int arch_os_thread_init(struct thread *thread) {
     stack_t sigstack;
 #ifdef LISP_FEATURE_SB_THREAD
+#ifdef LISP_FEATURE_GCC_TLS
+    current_thread = thread;
+#else
     pthread_setspecific(specials,thread);
 #endif
+#endif
 #ifdef LISP_FEATURE_C_STACK_IS_CONTROL_STACK
     /* Signal handlers are run on the control stack, so if it is exhausted
      * we had better use an alternate stack for whatever signal tells us
@@ -87,25 +91,25 @@ os_context_register_addr(os_context_t *context, int offset)
 #define RCASE(name) case reg_ ## name: return &context->uc_mcontext.gregs[REG_ ## name];
     switch(offset) {
         RCASE(RAX)
-       RCASE(RCX)
-       RCASE(RDX)
-       RCASE(RBX)
-       RCASE(RSP)
-       RCASE(RBP)
-       RCASE(RSI)
-       RCASE(RDI)
-       RCASE(R8)
-       RCASE(R9)
-       RCASE(R10)
-       RCASE(R11)
-       RCASE(R12)
-       RCASE(R13)
-       RCASE(R14)
-       RCASE(R15)
-      default: 
-       if(offset<NGREG) 
-           return &context->uc_mcontext.gregs[offset/2+4];
-       else return 0;
+        RCASE(RCX)
+        RCASE(RDX)
+        RCASE(RBX)
+        RCASE(RSP)
+        RCASE(RBP)
+        RCASE(RSI)
+        RCASE(RDI)
+        RCASE(R8)
+        RCASE(R9)
+        RCASE(R10)
+        RCASE(R11)
+        RCASE(R12)
+        RCASE(R13)
+        RCASE(R14)
+        RCASE(R15)
+      default:
+        if(offset<NGREG)
+            return &context->uc_mcontext.gregs[offset/2+4];
+        else return 0;
     }
     return &context->uc_mcontext.gregs[offset];
 }
@@ -118,7 +122,7 @@ os_context_pc_addr(os_context_t *context)
 
 os_context_register_t *
 os_context_sp_addr(os_context_t *context)
-{                              
+{
     return &context->uc_mcontext.gregs[REG_RSP];
 }
 
@@ -131,7 +135,7 @@ os_context_fp_addr(os_context_t *context)
 unsigned long
 os_context_fp_control(os_context_t *context)
 {
-    /* return the x87 exception flags ored in with the sse2 
+    /* return the x87 exception flags ored in with the sse2
      * control+status flags */
     unsigned int result = (context->uc_mcontext.fpregs->swd & 0x3F) | context->uc_mcontext.fpregs->mxcsr;
     /* flip exception mask bits */
@@ -147,11 +151,13 @@ os_context_sigmask_addr(os_context_t *context)
 void
 os_restore_fp_control(os_context_t *context)
 {
-    /* reset exception flags and restore control flags on SSE2 FPU */
-    unsigned int temp = (context->uc_mcontext.fpregs->mxcsr) & ~0x3F;
-    asm ("ldmxcsr %0" : : "m" (temp));
-    /* same for x87 FPU. */
-    asm ("fldcw %0" : : "m" (context->uc_mcontext.fpregs->cwd));
+    if (context->uc_mcontext.fpregs) {
+        /* reset exception flags and restore control flags on SSE2 FPU */
+        unsigned int temp = (context->uc_mcontext.fpregs->mxcsr) & ~0x3F;
+        asm ("ldmxcsr %0" : : "m" (temp));
+        /* same for x87 FPU. */
+        asm ("fldcw %0" : : "m" (context->uc_mcontext.fpregs->cwd));
+    }
 }
 
 void