0.9.11.19:

[sbcl.git] / src / runtime / x86-sunos-os.c

diff --git a/src/runtime/x86-sunos-os.c b/src/runtime/x86-sunos-os.c
index 834f964..4569063 100644 (file)
--- a/src/runtime/x86-sunos-os.c
+++ b/src/runtime/x86-sunos-os.c
@@ -43,12 +43,13 @@ int arch_os_thread_cleanup(struct thread *thread) {
 os_context_register_t   *
 os_context_register_addr(os_context_t *context, int offset)
 {
+    /* Solaris x86 holds %esp value in UESP */
     switch(offset) {
     case reg_EAX: return &context->uc_mcontext.gregs[11];
     case reg_ECX: return &context->uc_mcontext.gregs[10];
     case reg_EDX: return &context->uc_mcontext.gregs[9];
     case reg_EBX: return &context->uc_mcontext.gregs[8];
-    case reg_ESP: return &context->uc_mcontext.gregs[7];
+    case reg_ESP: return &context->uc_mcontext.gregs[17]; /* REG_UESP */
     case reg_EBP: return &context->uc_mcontext.gregs[6];
     case reg_ESI: return &context->uc_mcontext.gregs[5];
     case reg_EDI: return &context->uc_mcontext.gregs[4];
@@ -78,3 +79,14 @@ os_context_sigmask_addr(os_context_t *context)
 void os_flush_icache(os_vm_address_t address, os_vm_size_t length)
 {
 }
+
+unsigned long
+os_context_fp_control(os_context_t *context)
+{
+    int *state = context->uc_mcontext.fpregs.fp_reg_set.fpchip_state.state;
+    /* The STATE array is in the format used by the x86 instruction FNSAVE,
+     * so the FPU control word is in the first 16 bits */
+    int cw = (state[0] & 0xffff);
+    int sw = context->uc_mcontext.fpregs.fp_reg_set.fpchip_state.status;
+    return (cw ^ 0x3f) | (sw << 16);
+}