Corrections to disassembly of SHLD, SHRD and LEA on x86[-64].

Corrections to disassembly of SHLD, SHRD and LEA on x86[-64].

The double shifts were wrongly matching the bit pattern of some CMOV
variants. Corrected by using another instruction format on x86-64 and
by adding a constraint on the WIDTH field on x86. This made it possible
to enable the variant with an immediate shift count. On x86-64, changed
the maximum immediate shift count from 31 to 63.

Also, on x86-64, one of the printers for LEA was missing a WIDTH field
restriction, thus wrongly matching a "MOV to segment register", too.