Fix instruction encoding for XMM shifts with immediate count

 x86 keeps getting more and more devious: the source/dest operand
 is in the r/m field for these instructions, so REX.B must be set,
 rather than REX.R, to access > xmm7. Intel's new documentation
 seems clearer about these issues, at least.

diff --git a/src/compiler/x86-64/insts.lisp b/src/compiler/x86-64/insts.lisp
index 35f1c6e..7488457 100644 (file)
--- a/src/compiler/x86-64/insts.lisp
+++ b/src/compiler/x86-64/insts.lisp
@@ -2983,7 +2983,9 @@
   (aver (<= 0 /i 7))
   (when prefix
     (emit-byte segment prefix))
-  (maybe-emit-rex-prefix segment operand-size dst/src nil nil)
+  ;; dst/src is encoded in the r/m field, not r; REX.B must be
+  ;; set to use extended XMM registers
+  (maybe-emit-rex-prefix segment operand-size nil nil dst/src)
   (emit-byte segment #x0F)
   (emit-byte segment opcode)
   (emit-byte segment (logior (ash (logior #b11000 /i) 3)