* It turns out that the read-barrier operation is only needed on
Pentium Pro systems for SMP operation. This never worked right,
so there's no need to penalize other systems to support this.
* It turns out that the write-barrier operation is only needed
on OOSTORE systems for SMP operation. Thsi never worked right, so
there's no need to penalize other systems to support this.
* It turns out that x86-64 systems are neither Pentium Pro nor
OOSTORE.
* This breaks down if the barriers were required for device I/O
instead of SMP operation. Should anyone actually need such
barriers, adding them to the existing framework separately should
be simple enough.
(define-vop (%read-barrier)
(:policy :fast-safe)
(:translate %read-barrier)
- (:generator 3
- (inst lfence)))
+ (:generator 3))
#!+memory-barrier-vops
(define-vop (%write-barrier)
(:policy :fast-safe)
(:translate %write-barrier)
- (:generator 3
- (inst sfence)))
+ (:generator 3))
#!+memory-barrier-vops
(define-vop (%data-dependency-barrier)
(define-vop (%read-barrier)
(:policy :fast-safe)
(:translate %read-barrier)
- (:generator 3
- (inst add (make-ea :dword :base esp-tn) 0 :lock)))
+ (:generator 3))
#!+memory-barrier-vops
(define-vop (%write-barrier)
(:policy :fast-safe)
(:translate %write-barrier)
- (:generator 3
- (inst add (make-ea :dword :base esp-tn) 0 :lock)))
+ (:generator 3))
#!+memory-barrier-vops
(define-vop (%data-dependency-barrier)
;;; checkins which aren't released. (And occasionally for internal
;;; versions, especially for internal versions off the main CVS
;;; branch, it gets hairier, e.g. "0.pre7.14.flaky4.13".)
-"1.0.41.7"
+"1.0.41.8"