* Revert 1.0.29.54.rc5 to allow constant moves from LTV TNs.
* Modify the relevant VOPs to handle LTV constants correctly.
While this mostly results in duplicated code, VOPs can generate
better code even for unknown values in the constant vector.
(:results (y :scs (signed-reg unsigned-reg)))
(:note "constant load")
(:generator 1
- (inst li (tn-value x) y)))
+ (cond ((sc!c::tn-leaf x)
+ (inst li (tn-value x) y))
+ (t
+ (loadw y code-tn (tn-offset x) other-pointer-lowtag)
+ (inst sra y n-fixnum-tag-bits y)))))
(define-move-vop move-to-word-c :move
(constant) (signed-reg unsigned-reg))
(:arg-types tagged-num)
(:note "fixnum untagging")
(:generator 1
- (inst sra x 2 y)))
+ (inst sra x n-fixnum-tag-bits y)))
(define-move-vop move-to-word/fixnum :move
(any-reg descriptor-reg) (signed-reg unsigned-reg))
(:results (y :scs (signed-reg unsigned-reg)))
(:note "constant load")
(:generator 1
- (inst li (tn-value x) y)))
+ (cond ((sb!c::tn-leaf x)
+ (inst li (tn-value x) y))
+ (t
+ (loadw y code-tn (tn-offset x) other-pointer-lowtag)
+ (inst sra y n-fixnum-tag-bits y)))))
(define-move-vop move-to-word-c :move
(constant) (signed-reg unsigned-reg))
(:arg-types tagged-num)
(:note "fixnum untagging")
(:generator 1
- (inst sra y x 2)))
+ (inst sra y x n-fixnum-tag-bits)))
;;;
(define-move-vop move-to-word/fixnum :move
(any-reg descriptor-reg) (signed-reg unsigned-reg))
(:results (y :scs (signed-reg unsigned-reg)))
(:note "constant load")
(:generator 1
- (inst li y (tn-value x))))
+ (cond ((sb!c::tn-leaf x)
+ (inst li y (tn-value x)))
+ (t
+ (loadw y code-tn (tn-offset x) other-pointer-lowtag)
+ (inst sra y y n-fixnum-tag-bits)))))
;;;
(define-move-vop move-to-word-c :move
(constant) (signed-reg unsigned-reg))
(:arg-types tagged-num)
(:note "fixnum untagging")
(:generator 1
- (inst srawi y x 2)))
+ (inst srawi y x n-fixnum-tag-bits)))
(define-move-vop move-to-word/fixnum :move
(any-reg descriptor-reg) (signed-reg unsigned-reg))
(:results (y :scs (signed-reg unsigned-reg)))
(:note "constant load")
(:generator 1
- (inst lr y (tn-value x))))
+ (cond ((sb!c::tn-leaf x)
+ (inst lr y (tn-value x)))
+ (t
+ (loadw y code-tn (tn-offset x) other-pointer-lowtag)
+ (inst srawi y y n-fixnum-tag-bits)))))
(define-move-vop move-to-word-c :move
(constant) (signed-reg unsigned-reg))
(operand-restriction-ok
(first (template-result-types info))
(if write-p op-ptype other-ptype)
- :t-ok nil)
- ;; KLUDGE: Move VOPs with constant SCs can't use
- ;; load-time-value TNs. FIXME: if the VOPs were more
- ;; clever they could -- this is the release bandaid.
- (or (not (eq 'constant (sc-name op-sc)))
- (tn-leaf op-tn)))
+ :t-ok nil))
(return info))))))
;;; Emit a coercion VOP for OP BEFORE the specifed VOP or die trying.
(:results (y :scs (signed-reg unsigned-reg)))
(:note "constant load")
(:generator 1
- (inst li y (tn-value x))))
+ (cond ((sb!c::tn-leaf x)
+ (inst li y (tn-value x)))
+ (t
+ (loadw y code-tn (tn-offset x) other-pointer-lowtag)
+ (inst sra y y n-fixnum-tag-bits)))))
(define-move-vop move-to-word-c :move
(constant) (signed-reg unsigned-reg))
(:results (y :scs (signed-reg unsigned-reg)))
(:note "constant load")
(:generator 1
- (inst mov y (tn-value x))))
+ (cond ((sb!c::tn-leaf x)
+ (inst mov y (tn-value x)))
+ (t
+ (inst mov y x)
+ (inst sar y n-fixnum-tag-bits)))))
(define-move-vop move-to-word-c :move
(constant) (signed-reg unsigned-reg))
(:note "fixnum untagging")
(:generator 1
(move y x)
- (inst sar y 2)))
+ (inst sar y n-fixnum-tag-bits)))
(define-move-vop move-to-word/fixnum :move
(any-reg descriptor-reg) (signed-reg unsigned-reg))
(:results (y :scs (signed-reg unsigned-reg)))
(:note "constant load")
(:generator 1
- (inst mov y (tn-value x))))
+ (cond ((sb!c::tn-leaf x)
+ (inst mov y (tn-value x)))
+ (t
+ (inst mov y x)
+ (inst sar y n-fixnum-tag-bits)))))
(define-move-vop move-to-word-c :move
(constant) (signed-reg unsigned-reg))
;;; checkins which aren't released. (And occasionally for internal
;;; versions, especially for internal versions off the main CVS
;;; branch, it gets hairier, e.g. "0.pre7.14.flaky4.13".)
-"1.0.30.2"
+"1.0.30.3"